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MIR pre-codegen test for mem::replace

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This commit is contained in:
Scott McMurray 2023-04-29 22:33:57 -07:00
parent 831c9298c8
commit ca3f742ff6
3 changed files with 98 additions and 0 deletions
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16
tests/mir-opt/pre-codegen/mem_replace.manual_replace.PreCodegen.after.mir Normal file
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// MIR for `manual_replace` after PreCodegen
fn manual_replace(_1: &mut u32, _2: u32) -> u32 {
debug r => _1; // in scope 0 at $DIR/mem_replace.rs:+0:23: +0:24
debug v => _2; // in scope 0 at $DIR/mem_replace.rs:+0:36: +0:37
let mut _0: u32; // return place in scope 0 at $DIR/mem_replace.rs:+1:9: +1:13
scope 1 {
debug temp => _0; // in scope 1 at $DIR/mem_replace.rs:+1:9: +1:13
}
bb0: {
_0 = (*_1); // scope 0 at $DIR/mem_replace.rs:+1:16: +1:18
(*_1) = _2; // scope 1 at $DIR/mem_replace.rs:+2:5: +2:11
return; // scope 0 at $DIR/mem_replace.rs:+4:2: +4:2
}
}

65
tests/mir-opt/pre-codegen/mem_replace.mem_replace.PreCodegen.after.mir Normal file
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// MIR for `mem_replace` after PreCodegen
fn mem_replace(_1: &mut u32, _2: u32) -> u32 {
debug r => _1; // in scope 0 at $DIR/mem_replace.rs:+0:20: +0:21
debug v => _2; // in scope 0 at $DIR/mem_replace.rs:+0:33: +0:34
let mut _0: u32; // return place in scope 0 at $DIR/mem_replace.rs:+0:44: +0:47
scope 1 (inlined std::mem::replace::<u32>) { // at $DIR/mem_replace.rs:16:5: 16:28
debug dest => _1; // in scope 1 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
debug src => _2; // in scope 1 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
let mut _3: *const u32; // in scope 1 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
let mut _4: *mut u32; // in scope 1 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
let mut _5: u32; // in scope 1 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
scope 2 {
scope 3 {
debug result => _0; // in scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
scope 7 (inlined std::ptr::write::<u32>) { // at $SRC_DIR/core/src/mem/mod.rs:LL:COL
debug dst => _4; // in scope 7 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
debug src => _5; // in scope 7 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
let mut _7: *const u32; // in scope 7 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
let _8: &u32; // in scope 7 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
let mut _9: *mut u32; // in scope 7 at $SRC_DIR/core/src/intrinsics.rs:LL:COL
scope 8 {
scope 9 (inlined std::ptr::write::runtime::<u32>) { // at $SRC_DIR/core/src/intrinsics.rs:LL:COL
debug dst => _9; // in scope 9 at $SRC_DIR/core/src/intrinsics.rs:LL:COL
}
}
}
}
scope 4 (inlined std::ptr::read::<u32>) { // at $SRC_DIR/core/src/mem/mod.rs:LL:COL
debug src => _3; // in scope 4 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
let mut _6: *const u32; // in scope 4 at $SRC_DIR/core/src/intrinsics.rs:LL:COL
scope 5 {
scope 6 (inlined std::ptr::read::runtime::<u32>) { // at $SRC_DIR/core/src/intrinsics.rs:LL:COL
debug src => _6; // in scope 6 at $SRC_DIR/core/src/intrinsics.rs:LL:COL
}
}
}
}
}
bb0: {
StorageLive(_3); // scope 2 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
_3 = &raw const (*_1); // scope 2 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageLive(_6); // scope 2 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
_0 = (*_3); // scope 5 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
StorageDead(_6); // scope 2 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageDead(_3); // scope 2 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageLive(_4); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
_4 = &raw mut (*_1); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageLive(_5); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
_5 = _2; // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageLive(_9); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageLive(_7); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
StorageLive(_8); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
_8 = &_5; // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
_7 = &raw const (*_8); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
copy_nonoverlapping(dst = _4, src = move _7, count = const 1_usize); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
StorageDead(_7); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
StorageDead(_8); // scope 8 at $SRC_DIR/core/src/ptr/mod.rs:LL:COL
StorageDead(_9); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageDead(_5); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
StorageDead(_4); // scope 3 at $SRC_DIR/core/src/mem/mod.rs:LL:COL
return; // scope 0 at $DIR/mem_replace.rs:+2:2: +2:2
}
}

17
tests/mir-opt/pre-codegen/mem_replace.rs Normal file
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// compile-flags: -O -C debuginfo=0 -Zmir-opt-level=2
// only-64bit
// ignore-debug
#![crate_type = "lib"]
// EMIT_MIR mem_replace.manual_replace.PreCodegen.after.mir
pub fn manual_replace(r: &mut u32, v: u32) -> u32 {
let temp = *r;
*r = v;
temp
}
// EMIT_MIR mem_replace.mem_replace.PreCodegen.after.mir
pub fn mem_replace(r: &mut u32, v: u32) -> u32 {
std::mem::replace(r, v)
}