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support for mips64r6 as a target_arch value

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This commit is contained in:
chenx97 2023-06-02 11:18:26 +08:00
parent c44324a4fe
commit c6e03cd951
18 changed files with 20 additions and 10 deletions
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2
compiler/rustc_codegen_cranelift/example/float-minmax-pass.rs
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@ -22,7 +22,7 @@ fn main() {
#[cfg(not(any(target_arch = "mips", target_arch = "mips64")))] #[cfg(not(any(target_arch = "mips", target_arch = "mips64")))]
let nan = f32::NAN; let nan = f32::NAN;
// MIPS hardware treats f32::NAN as SNAN. Clear the signaling bit. // MIPS hardware except MIPS R6 treats f32::NAN as SNAN. Clear the signaling bit.
// See https://github.com/rust-lang/rust/issues/52746. // See https://github.com/rust-lang/rust/issues/52746.
#[cfg(any(target_arch = "mips", target_arch = "mips64"))] #[cfg(any(target_arch = "mips", target_arch = "mips64"))]
let nan = f32::from_bits(f32::NAN.to_bits() - 1); let nan = f32::from_bits(f32::NAN.to_bits() - 1);

1
compiler/rustc_codegen_gcc/example/alloc_system.rs
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@ -17,6 +17,7 @@
target_arch = "aarch64", target_arch = "aarch64",
target_arch = "loongarch64", target_arch = "loongarch64",
target_arch = "mips64", target_arch = "mips64",
target_arch = "mips64r6",
target_arch = "s390x", target_arch = "s390x",
target_arch = "sparc64"))] target_arch = "sparc64"))]
const MIN_ALIGN: usize = 16; const MIN_ALIGN: usize = 16;

1
compiler/rustc_codegen_ssa/src/back/metadata.rs
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@ -195,6 +195,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
"s390x" => Architecture::S390x, "s390x" => Architecture::S390x,
"mips" => Architecture::Mips, "mips" => Architecture::Mips,
"mips64" => Architecture::Mips64, "mips64" => Architecture::Mips64,
"mips64r6" => Architecture::Mips64,
"x86_64" => { "x86_64" => {
if sess.target.pointer_width == 32 { if sess.target.pointer_width == 32 {
Architecture::X86_64_X32 Architecture::X86_64_X32

2
compiler/rustc_codegen_ssa/src/target_features.rs
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@ -321,7 +321,7 @@ pub fn supported_target_features(sess: &Session) -> &'static [(&'static str, Opt
"aarch64" => AARCH64_ALLOWED_FEATURES, "aarch64" => AARCH64_ALLOWED_FEATURES,
"x86" | "x86_64" => X86_ALLOWED_FEATURES, "x86" | "x86_64" => X86_ALLOWED_FEATURES,
"hexagon" => HEXAGON_ALLOWED_FEATURES, "hexagon" => HEXAGON_ALLOWED_FEATURES,
"mips" | "mips64" => MIPS_ALLOWED_FEATURES, "mips" | "mips64" | "mips64r6" => MIPS_ALLOWED_FEATURES,
"powerpc" | "powerpc64" => POWERPC_ALLOWED_FEATURES, "powerpc" | "powerpc64" => POWERPC_ALLOWED_FEATURES,
"riscv32" | "riscv64" => RISCV_ALLOWED_FEATURES, "riscv32" | "riscv64" => RISCV_ALLOWED_FEATURES,
"wasm32" | "wasm64" => WASM_ALLOWED_FEATURES, "wasm32" | "wasm64" => WASM_ALLOWED_FEATURES,

1
compiler/rustc_target/src/abi/call/mod.rs
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@ -695,6 +695,7 @@ pub fn adjust_for_foreign_abi<C>(
"m68k" => m68k::compute_abi_info(self), "m68k" => m68k::compute_abi_info(self),
"mips" => mips::compute_abi_info(cx, self), "mips" => mips::compute_abi_info(cx, self),
"mips64" => mips64::compute_abi_info(cx, self), "mips64" => mips64::compute_abi_info(cx, self),
"mips64r6" => mips64::compute_abi_info(cx, self),
"powerpc" => powerpc::compute_abi_info(self), "powerpc" => powerpc::compute_abi_info(self),
"powerpc64" => powerpc64::compute_abi_info(cx, self), "powerpc64" => powerpc64::compute_abi_info(cx, self),
"s390x" => s390x::compute_abi_info(cx, self), "s390x" => s390x::compute_abi_info(cx, self),

1
compiler/rustc_target/src/asm/mod.rs
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@ -240,6 +240,7 @@ fn from_str(s: &str) -> Result<InlineAsmArch, ()> {
"loongarch64" => Ok(Self::LoongArch64), "loongarch64" => Ok(Self::LoongArch64),
"mips" => Ok(Self::Mips), "mips" => Ok(Self::Mips),
"mips64" => Ok(Self::Mips64), "mips64" => Ok(Self::Mips64),
"mips64r6" => Ok(Self::Mips64),
"s390x" => Ok(Self::S390x), "s390x" => Ok(Self::S390x),
"spirv" => Ok(Self::SpirV), "spirv" => Ok(Self::SpirV),
"wasm32" => Ok(Self::Wasm32), "wasm32" => Ok(Self::Wasm32),

2
compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs
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@ -6,7 +6,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa64r6-unknown-linux-gnuabi64".into(), llvm_target: "mipsisa64r6-unknown-linux-gnuabi64".into(),
pointer_width: 64, pointer_width: 64,
data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
arch: "mips64".into(), arch: "mips64r6".into(),
options: TargetOptions { options: TargetOptions {
abi: "abi64".into(), abi: "abi64".into(),
endian: Endian::Big, endian: Endian::Big,

2
compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs
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@ -5,7 +5,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa64r6el-unknown-linux-gnuabi64".into(), llvm_target: "mipsisa64r6el-unknown-linux-gnuabi64".into(),
pointer_width: 64, pointer_width: 64,
data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
arch: "mips64".into(), arch: "mips64r6".into(),
options: TargetOptions { options: TargetOptions {
abi: "abi64".into(), abi: "abi64".into(),
// NOTE(mips64r6) matches C toolchain // NOTE(mips64r6) matches C toolchain

1
library/std/src/os/linux/raw.rs
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@ -233,6 +233,7 @@ pub struct stat {
#[cfg(any( #[cfg(any(
target_arch = "loongarch64", target_arch = "loongarch64",
target_arch = "mips64", target_arch = "mips64",
target_arch = "mips64r6",
target_arch = "s390x", target_arch = "s390x",
target_arch = "sparc64", target_arch = "sparc64",
target_arch = "riscv64", target_arch = "riscv64",

2
library/std/src/sync/mpmc/utils.rs
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@ -36,6 +36,7 @@
target_arch = "arm", target_arch = "arm",
target_arch = "mips", target_arch = "mips",
target_arch = "mips64", target_arch = "mips64",
target_arch = "mips64r6",
target_arch = "riscv64", target_arch = "riscv64",
), ),
repr(align(32)) repr(align(32))
@ -60,6 +61,7 @@
target_arch = "arm", target_arch = "arm",
target_arch = "mips", target_arch = "mips",
target_arch = "mips64", target_arch = "mips64",
target_arch = "mips64r6",
target_arch = "riscv64", target_arch = "riscv64",
target_arch = "s390x", target_arch = "s390x",
)), )),

1
library/std/src/sys/common/alloc.rs
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@ -24,6 +24,7 @@
target_arch = "aarch64", target_arch = "aarch64",
target_arch = "loongarch64", target_arch = "loongarch64",
target_arch = "mips64", target_arch = "mips64",
target_arch = "mips64r6",
target_arch = "s390x", target_arch = "s390x",
target_arch = "sparc64", target_arch = "sparc64",
target_arch = "riscv64", target_arch = "riscv64",

2
library/std/src/sys/personality/gcc.rs
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@ -59,7 +59,7 @@
#[cfg(target_arch = "m68k")] #[cfg(target_arch = "m68k")]
const UNWIND_DATA_REG: (i32, i32) = (0, 1); // D0, D1 const UNWIND_DATA_REG: (i32, i32) = (0, 1); // D0, D1
#[cfg(any(target_arch = "mips", target_arch = "mips64"))] #[cfg(any(target_arch = "mips", target_arch = "mips64", target_arch = "mips64r6"))]
const UNWIND_DATA_REG: (i32, i32) = (4, 5); // A0, A1 const UNWIND_DATA_REG: (i32, i32) = (4, 5); // A0, A1
#[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))] #[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))]

2
library/unwind/src/libunwind.rs
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@ -54,7 +54,7 @@ pub enum _Unwind_Reason_Code {
#[cfg(target_arch = "mips")] #[cfg(target_arch = "mips")]
pub const unwinder_private_data_size: usize = 2; pub const unwinder_private_data_size: usize = 2;
#[cfg(target_arch = "mips64")] #[cfg(any(target_arch = "mips64", target_arch = "mips64r6"))]
pub const unwinder_private_data_size: usize = 2; pub const unwinder_private_data_size: usize = 2;
#[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))] #[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))]

3
src/bootstrap/lib.rs
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@ -133,7 +133,8 @@ pub unsafe fn setup(_build: &mut crate::Build) {}
/* Extra values not defined in the built-in targets yet, but used in std */ /* Extra values not defined in the built-in targets yet, but used in std */
(Some(Mode::Std), "target_env", Some(&["libnx"])), (Some(Mode::Std), "target_env", Some(&["libnx"])),
// (Some(Mode::Std), "target_os", Some(&[])), // (Some(Mode::Std), "target_os", Some(&[])),
(Some(Mode::Std), "target_arch", Some(&["asmjs", "spirv", "nvptx", "xtensa"])), // #[cfg(bootstrap)] mips64r6
(Some(Mode::Std), "target_arch", Some(&["asmjs", "spirv", "nvptx", "xtensa", "mips64r6"])),
/* Extra names used by dependencies */ /* Extra names used by dependencies */
// FIXME: Used by serde_json, but we should not be triggering on external dependencies. // FIXME: Used by serde_json, but we should not be triggering on external dependencies.
(Some(Mode::Rustc), "no_btreemap_remove_entry", None), (Some(Mode::Rustc), "no_btreemap_remove_entry", None),

1
src/librustdoc/clean/cfg.rs
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@ -521,6 +521,7 @@ fn fmt(&self, fmt: &mut fmt::Formatter<'_>) -> fmt::Result {
"m68k" => "M68k", "m68k" => "M68k",
"mips" => "MIPS", "mips" => "MIPS",
"mips64" => "MIPS-64", "mips64" => "MIPS-64",
"mips64r6" => "MIPS-64 Release 6",
"msp430" => "MSP430", "msp430" => "MSP430",
"powerpc" => "PowerPC", "powerpc" => "PowerPC",
"powerpc64" => "PowerPC-64", "powerpc64" => "PowerPC-64",

2
src/tools/miri/src/shims/foreign_items.rs
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@ -46,7 +46,7 @@ fn min_align(&self, size: u64, kind: MiriMemoryKind) -> Align {
// This list should be kept in sync with the one from libstd. // This list should be kept in sync with the one from libstd.
let min_align = match this.tcx.sess.target.arch.as_ref() { let min_align = match this.tcx.sess.target.arch.as_ref() {
"x86" | "arm" | "mips" | "powerpc" | "powerpc64" | "asmjs" | "wasm32" => 8, "x86" | "arm" | "mips" | "powerpc" | "powerpc64" | "asmjs" | "wasm32" => 8,
"x86_64" | "aarch64" | "mips64" | "s390x" | "sparc64" | "loongarch64" => 16, "x86_64" | "aarch64" | "mips64" | "mips64r6" | "s390x" | "sparc64" | "loongarch64" => 16,
arch => bug!("unsupported target architecture for malloc: `{}`", arch), arch => bug!("unsupported target architecture for malloc: `{}`", arch),
}; };
// Windows always aligns, even small allocations. // Windows always aligns, even small allocations.

2
tests/ui/check-cfg/compact-values.stderr
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@ -4,7 +4,7 @@ warning: unexpected `cfg` condition value
LL | #[cfg(target(os = "linux", arch = "X"))] LL | #[cfg(target(os = "linux", arch = "X"))]
| ^^^^^^^^^^ | ^^^^^^^^^^
| |
= note: expected values for `target_arch` are: `aarch64`, `arm`, `avr`, `bpf`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips64`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64` = note: expected values for `target_arch` are: `aarch64`, `arm`, `avr`, `bpf`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`
= note: `#[warn(unexpected_cfgs)]` on by default = note: `#[warn(unexpected_cfgs)]` on by default
warning: 1 warning emitted warning: 1 warning emitted

2
tests/ui/simd/intrinsic/float-minmax-pass.rs
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@ -21,7 +21,7 @@ fn main() {
#[cfg(not(any(target_arch = "mips", target_arch = "mips64")))] #[cfg(not(any(target_arch = "mips", target_arch = "mips64")))]
let nan = f32::NAN; let nan = f32::NAN;
// MIPS hardware treats f32::NAN as SNAN. Clear the signaling bit. // MIPS hardware except MIPS R6 treats f32::NAN as SNAN. Clear the signaling bit.
// See https://github.com/rust-lang/rust/issues/52746. // See https://github.com/rust-lang/rust/issues/52746.
#[cfg(any(target_arch = "mips", target_arch = "mips64"))] #[cfg(any(target_arch = "mips", target_arch = "mips64"))]
let nan = f32::from_bits(f32::NAN.to_bits() - 1); let nan = f32::from_bits(f32::NAN.to_bits() - 1);