Disable alignment checks on i686-pc-windows-msvc
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@ -15,6 +15,9 @@
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impl<'tcx> MirPass<'tcx> for CheckAlignment {
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fn is_enabled(&self, sess: &Session) -> bool {
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if sess.target.llvm_target == "i686-pc-windows-msvc" {
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return false;
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}
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sess.opts.debug_assertions
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}
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@ -1,5 +1,6 @@
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// run-fail
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// ignore-wasm32-bare: No panic messages
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// ignore-i686-pc-windows-msvc: #112480
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// compile-flags: -C debug-assertions
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// error-pattern: misaligned pointer dereference: address must be a multiple of 0x4 but is
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21
tests/ui/mir/mir_alignment_check_i686-pc-windows-msvc.rs
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21
tests/ui/mir/mir_alignment_check_i686-pc-windows-msvc.rs
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@ -0,0 +1,21 @@
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// run-pass
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// only-i686-pc-windows-msvc
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// compile-flags: -Copt-level=0 -Cdebug-assertions=yes
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// MSVC isn't sure if on 32-bit Windows its u64 type is 8-byte-aligned or 4-byte-aligned.
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// So this test ensures that on i686-pc-windows-msvc, we do not insert a runtime check
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// that will fail on dereferencing of a pointer to u64 which is not 8-byte-aligned but is
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// 4-byte-aligned.
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#![feature(strict_provenance)]
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fn main() {
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let mut x = [0u64; 2];
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let ptr: *mut u8 = x.as_mut_ptr().cast::<u8>();
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unsafe {
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let misaligned = ptr.add(4).cast::<u64>();
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assert!(misaligned.addr() % 8 != 0);
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assert!(misaligned.addr() % 4 == 0);
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*misaligned = 42;
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}
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}
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