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Update portable-simd

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This commit is contained in:
bjorn3 2022-09-05 12:01:37 +00:00
parent 7f260a953b
commit c4c393c78e
3 changed files with 171 additions and 64 deletions

2
build_system/prepare.rs

@ -41,7 +41,7 @@ pub(crate) fn prepare() {
"portable-simd",
"rust-lang",
"portable-simd",
"b8d6b6844602f80af79cd96401339ec594d472d8",
"d5cd4a8112d958bd3a252327e0d069a6363249bd",
);
apply_patches("portable-simd", Path::new("portable-simd"));

231
patches/0001-portable-simd-Disable-unsupported-tests.patch

@ -1,80 +1,188 @@
From 97c473937382a5b5858d9cce3c947855d23b2dc5 Mon Sep 17 00:00:00 2001
From 82f597cf81b169b0e72a576ac8751f598c059c48 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 18 Nov 2021 19:28:40 +0100
Subject: [PATCH] Disable unsupported tests
---
crates/core_simd/src/math.rs | 6 ++++++
crates/core_simd/src/vector.rs | 2 ++
crates/core_simd/tests/masks.rs | 2 ++
crates/core_simd/tests/ops_macros.rs | 4 ++++
4 files changed, 14 insertions(+)
crates/core_simd/src/elements/int.rs | 8 ++++++++
crates/core_simd/src/elements/uint.rs | 4 ++++
crates/core_simd/src/masks/full_masks.rs | 9 +++++++++
crates/core_simd/src/vector.rs | 2 ++
crates/core_simd/tests/masks.rs | 2 ++
5 files changed, 25 insertions(+)
diff --git a/crates/core_simd/src/math.rs b/crates/core_simd/src/math.rs
index 2bae414..2f87499 100644
--- a/crates/core_simd/src/math.rs
+++ b/crates/core_simd/src/math.rs
@@ -5,6 +5,7 @@ macro_rules! impl_uint_arith {
($($ty:ty),+) => {
$( impl<const LANES: usize> Simd<$ty, LANES> where LaneCount<LANES>: SupportedLaneCount {
diff --git a/crates/core_simd/src/elements/int.rs b/crates/core_simd/src/elements/int.rs
index 9b8c37e..ea95f08 100644
--- a/crates/core_simd/src/elements/int.rs
+++ b/crates/core_simd/src/elements/int.rs
@@ -11,6 +11,7 @@ pub trait SimdInt: Copy + Sealed {
/// Scalar type contained by this SIMD vector type.
type Scalar;
+ /*
/// Lanewise saturating add.
///
/// # Examples
@@ -45,6 +46,7 @@ pub trait SimdInt: Copy + Sealed {
/// assert_eq!(unsat, Simd::from_array([1, MAX, MIN, 0]));
/// assert_eq!(sat, Simd::from_array([MIN, MIN, MIN, 0]));
fn saturating_sub(self, second: Self) -> Self;
+ */
/// Lanewise absolute value, implemented in Rust.
/// Every lane becomes its absolute value.
@@ -61,6 +63,7 @@ pub trait SimdInt: Copy + Sealed {
/// ```
fn abs(self) -> Self;
+ /*
/// Lanewise saturating absolute value, implemented in Rust.
/// As abs(), except the MIN value becomes MAX instead of itself.
///
@@ -96,6 +99,7 @@ pub trait SimdInt: Copy + Sealed {
/// assert_eq!(sat, Simd::from_array([MAX, 2, -3, MIN + 1]));
/// ```
fn saturating_neg(self) -> Self;
+ */
/// Returns true for each positive lane and false if it is zero or negative.
fn is_positive(self) -> Self::Mask;
@@ -199,6 +203,7 @@ macro_rules! impl_trait {
type Mask = Mask<<$ty as SimdElement>::Mask, LANES>;
type Scalar = $ty;
+ /*
/// Lanewise saturating add.
///
/// # Examples
@@ -43,6 +44,7 @@ macro_rules! impl_uint_arith {
pub fn saturating_sub(self, second: Self) -> Self {
unsafe { simd_saturating_sub(self, second) }
}
+ */
})+
}
}
@@ -51,6 +53,7 @@ macro_rules! impl_int_arith {
($($ty:ty),+) => {
$( impl<const LANES: usize> Simd<$ty, LANES> where LaneCount<LANES>: SupportedLaneCount {
+ /*
/// Lanewise saturating add.
///
/// # Examples
@@ -89,6 +92,7 @@ macro_rules! impl_int_arith {
pub fn saturating_sub(self, second: Self) -> Self {
unsafe { simd_saturating_sub(self, second) }
#[inline]
fn saturating_add(self, second: Self) -> Self {
// Safety: `self` is a vector
@@ -210,6 +215,7 @@ macro_rules! impl_trait {
// Safety: `self` is a vector
unsafe { intrinsics::simd_saturating_sub(self, second) }
}
+ */
/// Lanewise absolute value, implemented in Rust.
/// Every lane becomes its absolute value.
@@ -109,6 +113,7 @@ macro_rules! impl_int_arith {
#[inline]
fn abs(self) -> Self {
@@ -218,6 +224,7 @@ macro_rules! impl_trait {
(self^m) - m
}
+ /*
/// Lanewise saturating absolute value, implemented in Rust.
/// As abs(), except the MIN value becomes MAX instead of itself.
///
@@ -151,6 +156,7 @@ macro_rules! impl_int_arith {
pub fn saturating_neg(self) -> Self {
#[inline]
fn saturating_abs(self) -> Self {
// arith shift for -1 or 0 mask based on sign bit, giving 2s complement
@@ -230,6 +237,7 @@ macro_rules! impl_trait {
fn saturating_neg(self) -> Self {
Self::splat(0).saturating_sub(self)
}
+ */
})+
#[inline]
fn is_positive(self) -> Self::Mask {
diff --git a/crates/core_simd/src/elements/uint.rs b/crates/core_simd/src/elements/uint.rs
index 21e7e76..0d6dee2 100644
--- a/crates/core_simd/src/elements/uint.rs
+++ b/crates/core_simd/src/elements/uint.rs
@@ -6,6 +6,7 @@ pub trait SimdUint: Copy + Sealed {
/// Scalar type contained by this SIMD vector type.
type Scalar;
+ /*
/// Lanewise saturating add.
///
/// # Examples
@@ -40,6 +41,7 @@ pub trait SimdUint: Copy + Sealed {
/// assert_eq!(unsat, Simd::from_array([3, 2, 1, 0]));
/// assert_eq!(sat, Simd::splat(0));
fn saturating_sub(self, second: Self) -> Self;
+ */
/// Returns the sum of the lanes of the vector, with wrapping addition.
fn reduce_sum(self) -> Self::Scalar;
@@ -78,6 +80,7 @@ macro_rules! impl_trait {
{
type Scalar = $ty;
+ /*
#[inline]
fn saturating_add(self, second: Self) -> Self {
// Safety: `self` is a vector
@@ -89,6 +92,7 @@ macro_rules! impl_trait {
// Safety: `self` is a vector
unsafe { intrinsics::simd_saturating_sub(self, second) }
}
+ */
#[inline]
fn reduce_sum(self) -> Self::Scalar {
diff --git a/crates/core_simd/src/masks/full_masks.rs b/crates/core_simd/src/masks/full_masks.rs
index adf0fcb..5b10292 100644
--- a/crates/core_simd/src/masks/full_masks.rs
+++ b/crates/core_simd/src/masks/full_masks.rs
@@ -150,6 +150,7 @@ where
super::Mask<T, LANES>: ToBitMaskArray,
[(); <super::Mask<T, LANES> as ToBitMaskArray>::BYTES]: Sized,
{
+ /*
assert_eq!(<super::Mask<T, LANES> as ToBitMaskArray>::BYTES, N);
// Safety: N is the correct bitmask size
@@ -170,6 +171,8 @@ where
bitmask
}
+ */
+ panic!();
}
}
#[cfg(feature = "generic_const_exprs")]
@@ -209,6 +212,7 @@ where
where
super::Mask<T, LANES>: ToBitMask<BitMask = U>,
{
+ /*
// Safety: U is required to be the appropriate bitmask type
let bitmask: U = unsafe { intrinsics::simd_bitmask(self.0) };
@@ -218,6 +222,8 @@ where
} else {
bitmask
}
+ */
+ panic!();
}
#[inline]
@@ -225,6 +231,7 @@ where
where
super::Mask<T, LANES>: ToBitMask<BitMask = U>,
{
+ /*
// LLVM assumes bit order should match endianness
let bitmask = if cfg!(target_endian = "big") {
bitmask.reverse_bits(LANES)
@@ -240,6 +247,8 @@ where
Self::splat(false).to_int(),
))
}
+ */
+ panic!();
}
#[inline]
diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs
index 7c5ec2b..c8631e8 100644
index e8e8f68..7173c24 100644
--- a/crates/core_simd/src/vector.rs
+++ b/crates/core_simd/src/vector.rs
@@ -75,6 +75,7 @@ where
Self(array)
@@ -250,6 +250,7 @@ where
unsafe { intrinsics::simd_cast(self) }
}
+ /*
/// Reads from potentially discontiguous indices in `slice` to construct a SIMD vector.
/// If an index is out-of-bounds, the lane is instead selected from the `or` vector.
///
@@ -297,6 +298,7 @@ where
@@ -473,6 +474,7 @@ where
// Cleared ☢️ *mut T Zone
}
}
@ -83,25 +191,24 @@ index 7c5ec2b..c8631e8 100644
impl<T, const LANES: usize> Copy for Simd<T, LANES>
diff --git a/crates/core_simd/tests/masks.rs b/crates/core_simd/tests/masks.rs
index 6a8ecd3..68fcb49 100644
index 673d0db..0d68b01 100644
--- a/crates/core_simd/tests/masks.rs
+++ b/crates/core_simd/tests/masks.rs
@@ -68,6 +68,7 @@ macro_rules! test_mask_api {
assert_eq!(core_simd::Mask::<$type, 8>::from_int(int), mask);
@@ -59,6 +59,7 @@ macro_rules! test_mask_api {
assert!(!v.all());
}
+ /*
#[cfg(feature = "generic_const_exprs")]
#[test]
fn roundtrip_bitmask_conversion() {
@@ -80,6 +81,7 @@ macro_rules! test_mask_api {
assert_eq!(bitmask, [0b01001001, 0b10000011]);
assert_eq!(core_simd::Mask::<$type, 16>::from_bitmask(bitmask), mask);
fn roundtrip_int_conversion() {
let values = [true, false, false, true, false, false, true, false];
@@ -99,6 +100,7 @@ macro_rules! test_mask_api {
assert_eq!(bitmask, 0b01);
assert_eq!(core_simd::Mask::<$type, 2>::from_bitmask(bitmask), mask);
}
+ */
}
}
}
#[test]
fn cast() {
--
2.26.2.7.g19db9cfb68
2.25.1

2
src/intrinsics/simd.rs

@ -26,7 +26,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
span: Span,
) {
match intrinsic {
sym::simd_cast => {
sym::simd_as | sym::simd_cast => {
intrinsic_args!(fx, args => (a); intrinsic);
if !a.layout().ty.is_simd() {