Auto merge of #128466 - sayantn:stdarch-update, r=tgross35

Update the stdarch submodule

cc `@tgross35` `@Amanieu`
r? `@tgross35`

try-job: dist-various-2

library/core/src/lib.rs

@@ -264,6 +264,7 @@
 #![feature(sse4a_target_feature)]
 #![feature(tbm_target_feature)]
 #![feature(wasm_target_feature)]
+#![feature(x86_amx_intrinsics)]
 // tidy-alphabetical-end
 
 // allow using `core::` in intra-doc links

library/stdarch

@@ -1 +1 @@
-Subproject commit df3618d9f35165f4bc548114e511c49c29e1fd9b
+Subproject commit 47b929ddc521a78b0f699ba8d5c274d28593448a

tests/codegen/simd/issue-120720-reduce-nan.rs

@@ -1,21 +0,0 @@
-//@ compile-flags: -C opt-level=3 -C target-cpu=cannonlake
-//@ only-x86_64
-
-// In a previous implementation, _mm512_reduce_add_pd did the reduction with all fast-math flags
-// enabled, making it UB to reduce a vector containing a NaN.
-
-#![crate_type = "lib"]
-#![feature(stdarch_x86_avx512, avx512_target_feature)]
-use std::arch::x86_64::*;
-
-// CHECK-LABEL: @demo(
-#[no_mangle]
-#[target_feature(enable = "avx512f")] // Function-level target feature mismatches inhibit inlining
-pub unsafe fn demo() -> bool {
-    // CHECK: %0 = tail call reassoc double @llvm.vector.reduce.fadd.v8f64(
-    // CHECK: %_0.i = fcmp uno double %0, 0.000000e+00
-    // CHECK: ret i1 %_0.i
-    let res =
-        unsafe { _mm512_reduce_add_pd(_mm512_set_pd(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, f64::NAN)) };
-    res.is_nan()
-}