Generically implement horizontal_{and,or,xor}
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ced3a05526
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@ -2,7 +2,8 @@ use crate::simd::intrinsics::{
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simd_reduce_add_ordered, simd_reduce_and, simd_reduce_max, simd_reduce_min,
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simd_reduce_mul_ordered, simd_reduce_or, simd_reduce_xor,
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};
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use crate::simd::{LaneCount, Simd, SupportedLaneCount};
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use crate::simd::{LaneCount, Simd, SimdElement, SupportedLaneCount};
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use core::ops::{BitAnd, BitOr, BitXor};
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macro_rules! impl_integer_reductions {
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{ $scalar:ty } => {
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@ -22,27 +23,6 @@ macro_rules! impl_integer_reductions {
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unsafe { simd_reduce_mul_ordered(self, 1) }
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}
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/// Horizontal bitwise "and". Returns the cumulative bitwise "and" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_and(self) -> $scalar {
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unsafe { simd_reduce_and(self) }
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}
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/// Horizontal bitwise "or". Returns the cumulative bitwise "or" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_or(self) -> $scalar {
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unsafe { simd_reduce_or(self) }
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}
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/// Horizontal bitwise "xor". Returns the cumulative bitwise "xor" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_xor(self) -> $scalar {
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unsafe { simd_reduce_xor(self) }
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}
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/// Horizontal maximum. Returns the maximum lane in the vector.
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#[inline]
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pub fn horizontal_max(self) -> $scalar {
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@ -121,3 +101,45 @@ macro_rules! impl_float_reductions {
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impl_float_reductions! { f32 }
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impl_float_reductions! { f64 }
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitAnd<Self, Output = Self>,
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T: SimdElement + BitAnd<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Horizontal bitwise "and". Returns the cumulative bitwise "and" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_and(self) -> T {
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unsafe { simd_reduce_and(self) }
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}
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}
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitOr<Self, Output = Self>,
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T: SimdElement + BitOr<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Horizontal bitwise "or". Returns the cumulative bitwise "or" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_or(self) -> T {
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unsafe { simd_reduce_or(self) }
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}
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}
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitXor<Self, Output = Self>,
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T: SimdElement + BitXor<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Horizontal bitwise "xor". Returns the cumulative bitwise "xor" across the lanes of
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/// the vector.
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#[inline]
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pub fn horizontal_xor(self) -> T {
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unsafe { simd_reduce_xor(self) }
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}
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}
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