From a0d4372ff9bf773a64c9dc7c51ef0392817c27ee Mon Sep 17 00:00:00 2001 From: Frank Steffahn Date: Sun, 22 Aug 2021 14:28:05 +0200 Subject: [PATCH] =?UTF-8?q?Fix=20typos=20=E2=80=9Ca=E2=80=9D=E2=86=92?= =?UTF-8?q?=E2=80=9Can=E2=80=9D?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/data_race.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/data_race.rs b/src/data_race.rs index 6a64c1cb693..9e5dfd9dbaf 100644 --- a/src/data_race.rs +++ b/src/data_race.rs @@ -42,7 +42,7 @@ //! order exists in which all threads observe all modifications in the same //! order (see Sequentially-consistent ordering below) " //! So in the absence of weak memory effects a seq-cst load & a seq-cst store is identical -//! to a acquire load and a release store given the global sequentially consistent order +//! to an acquire load and a release store given the global sequentially consistent order //! of the schedule. //! //! The timestamps used in the data-race detector assign each sequence of non-atomic operations @@ -142,7 +142,7 @@ fn apply_release_fence(&mut self) { self.fence_release.clone_from(&self.clock); } - /// Apply the effects of a acquire fence to this + /// Apply the effects of an acquire fence to this /// set of thread vector clocks. #[inline] fn apply_acquire_fence(&mut self) { @@ -503,7 +503,7 @@ fn write_scalar_atomic( this.validate_atomic_store(dest, atomic) } - /// Perform a atomic operation on a memory location. + /// Perform an atomic operation on a memory location. fn atomic_op_immediate( &mut self, place: &MPlaceTy<'tcx, Tag>, @@ -695,7 +695,7 @@ fn validate_atomic_fence(&mut self, atomic: AtomicFenceOp) -> InterpResult<'tcx> log::trace!("Atomic fence on {:?} with ordering {:?}", index, atomic); // Apply data-race detection for the current fences - // this treats AcqRel and SeqCst as the same as a acquire + // this treats AcqRel and SeqCst as the same as an acquire // and release fence applied in the same timestamp. if atomic != AtomicFenceOp::Release { // Either Acquire | AcqRel | SeqCst