From 9f6e6872c21a467af8946381e40b9021cf18066c Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Tue, 31 May 2022 16:15:40 +0800 Subject: [PATCH] riscv32imac-unknown-xous-elf: add target Xous is a microkernel operating system designed to run on small systems. The kernel contains a wide range of userspace processes that provide common services such as console output, networking, and time access. The kernel and its services are completely written in Rust using a custom build of libstd. This adds support for this target to upstream Rust so that we can drop support for our out-of-tree `target.json` file. Add a Tier 3 target for Xous running on RISC-V. Signed-off-by: Sean Cross --- compiler/rustc_target/src/spec/mod.rs | 1 + .../src/spec/riscv32imac_unknown_xous_elf.rs | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 compiler/rustc_target/src/spec/riscv32imac_unknown_xous_elf.rs diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 6dd245b047c..07d5edc0a84 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -983,6 +983,7 @@ supported_targets! { ("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf), ("riscv32imc-esp-espidf", riscv32imc_esp_espidf), ("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf), + ("riscv32imac-unknown-xous-elf", riscv32imac_unknown_xous_elf), ("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu), ("riscv32gc-unknown-linux-musl", riscv32gc_unknown_linux_musl), ("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf), diff --git a/compiler/rustc_target/src/spec/riscv32imac_unknown_xous_elf.rs b/compiler/rustc_target/src/spec/riscv32imac_unknown_xous_elf.rs new file mode 100644 index 00000000000..b46ca159370 --- /dev/null +++ b/compiler/rustc_target/src/spec/riscv32imac_unknown_xous_elf.rs @@ -0,0 +1,24 @@ +use crate::spec::{LinkerFlavor, LldFlavor, PanicStrategy, RelocModel}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + os: "xous".into(), + linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(32), + features: "+m,+a,+c".into(), + executables: true, + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + ..Default::default() + }, + } +}