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Enable #[thread_local] for all windows-msvc targets

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This commit is contained in:
Chris Denton 2021-12-17 15:47:44 +00:00
parent 2595d03827
commit 9ca26f111a
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GPG Key ID: 713472F2F45627DE
7 changed files with 1 additions and 6 deletions
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1
compiler/rustc_target/src/spec/aarch64_pc_windows_msvc.rs
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@ -3,7 +3,6 @@
pub fn target() -> Target {
let mut base = super::windows_msvc_base::opts();
base.max_atomic_width = Some(64);
base.has_elf_tls = true;
base.features = "+neon,+fp-armv8".to_string();
Target {

1
compiler/rustc_target/src/spec/aarch64_uwp_windows_msvc.rs
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@ -3,7 +3,6 @@
pub fn target() -> Target {
let mut base = super::windows_uwp_msvc_base::opts();
base.max_atomic_width = Some(64);
base.has_elf_tls = true;
Target {
llvm_target: "aarch64-pc-windows-msvc".to_string(),

1
compiler/rustc_target/src/spec/i686_uwp_windows_msvc.rs
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@ -4,7 +4,6 @@ pub fn target() -> Target {
let mut base = super::windows_uwp_msvc_base::opts();
base.cpu = "pentium4".to_string();
base.max_atomic_width = Some(64);
base.has_elf_tls = true;
Target {
llvm_target: "i686-pc-windows-msvc".to_string(),

1
compiler/rustc_target/src/spec/thumbv7a_uwp_windows_msvc.rs
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@ -9,7 +9,6 @@ pub fn target() -> Target {
options: TargetOptions {
features: "+vfp3,+neon".to_string(),
max_atomic_width: Some(64),
has_elf_tls: true,
// FIXME(jordanrh): use PanicStrategy::Unwind when SEH is
// implemented for windows/arm in LLVM
panic_strategy: PanicStrategy::Abort,

1
compiler/rustc_target/src/spec/windows_msvc_base.rs
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@ -27,6 +27,7 @@ pub fn opts() -> TargetOptions {
// linking some libraries which require a specific agreement, so it may
// not ever be possible for us to pass this flag.
no_default_libraries: false,
has_elf_tls: true,
..base
}

1
compiler/rustc_target/src/spec/x86_64_pc_windows_msvc.rs
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@ -4,7 +4,6 @@ pub fn target() -> Target {
let mut base = super::windows_msvc_base::opts();
base.cpu = "x86-64".to_string();
base.max_atomic_width = Some(64);
base.has_elf_tls = true;
Target {
llvm_target: "x86_64-pc-windows-msvc".to_string(),

1
compiler/rustc_target/src/spec/x86_64_uwp_windows_msvc.rs
View File

@ -4,7 +4,6 @@ pub fn target() -> Target {
let mut base = super::windows_uwp_msvc_base::opts();
base.cpu = "x86-64".to_string();
base.max_atomic_width = Some(64);
base.has_elf_tls = true;
Target {
llvm_target: "x86_64-pc-windows-msvc".to_string(),