mikros/rust
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

use the correct link

Browse Source 
Signed-off-by: cui fliter <imcusg@gmail.com>
This commit is contained in:
cui fliter 2023-08-23 21:36:45 +08:00
parent 3475fa74e1
commit 9c3f44f922
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
library/core/src/convert/num.rs
View File

@ -142,9 +142,9 @@ impl_from! { i16, isize, #[stable(feature = "lossless_iusize_conv", since = "1.2
// RISC-V defines the possibility of a 128-bit address space (RV128).
// CHERI proposes 256-bit “capabilities”. Unclear if this would be relevant to usize/isize.
// CHERI proposes 128-bit “capabilities”. Unclear if this would be relevant to usize/isize.
// https://www.cl.cam.ac.uk/research/security/ctsrd/pdfs/20171017a-cheri-poster.pdf
// https://www.csl.sri.com/users/neumann/2012resolve-cheri.pdf
// https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf
// Note: integers can only be represented with full precision in a float if
// they fit in the significand, which is 24 bits in f32 and 53 bits in f64.