Temporarily ignore regex test which gets miscompiled when using an LLVM sysroot
cc #1395
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@ -0,0 +1,25 @@
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From 5d4afb8d807d181038b6a004d17ed055a8d191b2 Mon Sep 17 00:00:00 2001
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From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
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Date: Mon, 2 Oct 2023 13:59:00 +0000
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Subject: [PATCH] Ignore test which gets miscompiled with llvm sysroot
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---
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regex-automata/src/util/pool.rs | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/regex-automata/src/util/pool.rs b/regex-automata/src/util/pool.rs
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index c03d7b0..28b233b 100644
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--- a/regex-automata/src/util/pool.rs
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+++ b/regex-automata/src/util/pool.rs
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@@ -1081,6 +1081,8 @@ mod tests {
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// into the pool. This in turn resulted in this test producing a data race.
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#[cfg(feature = "std")]
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#[test]
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+ // FIXME(rustc_codegen_cranelift#1395) miscompilation of thread::scope with LLVM sysroot
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+ #[ignore]
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fn thread_owner_sync() {
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let pool = Pool::new(|| vec!['a']);
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{
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--
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2.34.1
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