From 8d3d616b130e65bcb926645597b69fb136cc03b5 Mon Sep 17 00:00:00 2001 From: Thom Chiovoloni Date: Tue, 6 Oct 2020 13:40:39 -0700 Subject: [PATCH] Apply review feedback --- crates/core_simd/src/macros.rs | 3 +-- crates/core_simd/tests/ops_impl/float_macros.rs | 12 +++++++++--- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/crates/core_simd/src/macros.rs b/crates/core_simd/src/macros.rs index 214867c5ddc..f37d13c3ca3 100644 --- a/crates/core_simd/src/macros.rs +++ b/crates/core_simd/src/macros.rs @@ -295,8 +295,7 @@ macro_rules! impl_float_vector { #[inline] pub fn abs(self) -> Self { let no_sign = <$bits_ty>::splat(!0 >> 1); - let abs = unsafe { crate::intrinsics::simd_and(self.to_bits(), no_sign) }; - Self::from_bits(abs) + Self::from_bits(self.to_bits() & no_sign) } } }; diff --git a/crates/core_simd/tests/ops_impl/float_macros.rs b/crates/core_simd/tests/ops_impl/float_macros.rs index 141cb52207b..1c969a2e8af 100644 --- a/crates/core_simd/tests/ops_impl/float_macros.rs +++ b/crates/core_simd/tests/ops_impl/float_macros.rs @@ -19,6 +19,11 @@ macro_rules! float_tests { value } + fn slice_chunks(slice: &[$scalar]) -> impl Iterator + '_ { + let lanes = core::mem::size_of::() / core::mem::size_of::<$scalar>(); + slice.chunks_exact(lanes).map(from_slice) + } + const A: [$scalar; 16] = [0., 1., 2., 3., 4., 5., 6., 7., 8., 9., 10., 11., 12., 13., 14., 15.]; const B: [$scalar; 16] = [16., 17., 18., 19., 20., 21., 22., 23., 24., 25., 26., 27., 28., 29., 30., 31.]; const C: [$scalar; 16] = [ @@ -303,9 +308,10 @@ macro_rules! float_tests { #[test] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] fn abs_odd_floats() { - let v = from_slice(&C); - let expected = apply_unary_lanewise(v, <$scalar>::abs); - assert_biteq!(v.abs(), expected); + for v in slice_chunks(&C) { + let expected = apply_unary_lanewise(v, <$scalar>::abs); + assert_biteq!(v.abs(), expected); + } } } }