From 3ec4eeddefcf022af3aafab708d36830f40d8a47 Mon Sep 17 00:00:00 2001 From: Scott McMurray Date: Fri, 16 Jun 2023 15:21:34 -0700 Subject: [PATCH] [libs] Simplify `unchecked_{shl,shr}` There's no need for the `const_eval_select` dance here. And while I originally wrote the `.try_into().unwrap_unchecked()` implementation here, it's kinda a mess in MIR -- this new one is substantially simpler, as shown by the old one being above the inlining threshold but the new one being below it. --- library/core/src/num/mod.rs | 17 +--- tests/codegen/unchecked_shifts.rs | 4 + tests/mir-opt/inline/unchecked_shifts.rs | 12 +++ ...hl_unsigned_bigger.Inline.panic-abort.diff | 36 +++++++ ...l_unsigned_bigger.Inline.panic-unwind.diff | 36 +++++++ ...ed_bigger.PreCodegen.after.panic-abort.mir | 25 +++++ ...d_bigger.PreCodegen.after.panic-unwind.mir | 25 +++++ ...l_unsigned_smaller.Inline.panic-abort.diff | 22 ++++- ..._unsigned_smaller.Inline.panic-unwind.diff | 22 ++++- ...d_smaller.PreCodegen.after.panic-abort.mir | 21 +++- ..._smaller.PreCodegen.after.panic-unwind.mir | 21 +++- ..._shr_signed_bigger.Inline.panic-abort.diff | 36 +++++++ ...shr_signed_bigger.Inline.panic-unwind.diff | 36 +++++++ ...ed_bigger.PreCodegen.after.panic-abort.mir | 25 +++++ ...d_bigger.PreCodegen.after.panic-unwind.mir | 25 +++++ ...shr_signed_smaller.Inline.panic-abort.diff | 22 ++++- ...hr_signed_smaller.Inline.panic-unwind.diff | 22 ++++- ...d_smaller.PreCodegen.after.panic-abort.mir | 21 +++- ..._smaller.PreCodegen.after.panic-unwind.mir | 21 +++- ...ecked_ops.checked_shl.PreCodegen.after.mir | 99 ++++--------------- 20 files changed, 449 insertions(+), 99 deletions(-) create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir create mode 100644 tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir diff --git a/library/core/src/num/mod.rs b/library/core/src/num/mod.rs index c9baa09f407..95dcaf5dd73 100644 --- a/library/core/src/num/mod.rs +++ b/library/core/src/num/mod.rs @@ -3,7 +3,6 @@ #![stable(feature = "rust1", since = "1.0.0")] use crate::ascii; -use crate::convert::TryInto; use crate::intrinsics; use crate::mem; use crate::ops::{Add, Mul, Sub}; @@ -278,18 +277,12 @@ pub const fn carrying_mul(self, rhs: Self, carry: Self) -> (Self, Self) { macro_rules! conv_rhs_for_unchecked_shift { ($SelfT:ty, $x:expr) => {{ - #[inline] - fn conv(x: u32) -> $SelfT { - // FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`. - // SAFETY: Any legal shift amount must be losslessly representable in the self type. - unsafe { x.try_into().ok().unwrap_unchecked() } + // If the `as` cast will truncate, ensure we still tell the backend + // that the pre-truncation value was also small. + if <$SelfT>::BITS < 32 { + intrinsics::assume($x <= (<$SelfT>::MAX as u32)); } - #[inline] - const fn const_conv(x: u32) -> $SelfT { - x as _ - } - - intrinsics::const_eval_select(($x,), const_conv, conv) + $x as $SelfT }}; } diff --git a/tests/codegen/unchecked_shifts.rs b/tests/codegen/unchecked_shifts.rs index 60d0cb09aca..0924dda08ee 100644 --- a/tests/codegen/unchecked_shifts.rs +++ b/tests/codegen/unchecked_shifts.rs @@ -8,6 +8,7 @@ // CHECK-LABEL: @unchecked_shl_unsigned_same #[no_mangle] pub unsafe fn unchecked_shl_unsigned_same(a: u32, b: u32) -> u32 { + // CHECK-NOT: assume // CHECK-NOT: and i32 // CHECK: shl i32 %a, %b // CHECK-NOT: and i32 @@ -30,6 +31,7 @@ pub unsafe fn unchecked_shl_unsigned_smaller(a: u16, b: u32) -> u16 { // CHECK-LABEL: @unchecked_shl_unsigned_bigger #[no_mangle] pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 { + // CHECK-NOT: assume // CHECK: %[[EXT:.+]] = zext i32 %b to i64 // CHECK: shl i64 %a, %[[EXT]] a.unchecked_shl(b) @@ -38,6 +40,7 @@ pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 { // CHECK-LABEL: @unchecked_shr_signed_same #[no_mangle] pub unsafe fn unchecked_shr_signed_same(a: i32, b: u32) -> i32 { + // CHECK-NOT: assume // CHECK-NOT: and i32 // CHECK: ashr i32 %a, %b // CHECK-NOT: and i32 @@ -60,6 +63,7 @@ pub unsafe fn unchecked_shr_signed_smaller(a: i16, b: u32) -> i16 { // CHECK-LABEL: @unchecked_shr_signed_bigger #[no_mangle] pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 { + // CHECK-NOT: assume // CHECK: %[[EXT:.+]] = zext i32 %b to i64 // CHECK: ashr i64 %a, %[[EXT]] a.unchecked_shr(b) diff --git a/tests/mir-opt/inline/unchecked_shifts.rs b/tests/mir-opt/inline/unchecked_shifts.rs index 64ec26b587d..22f84e44a64 100644 --- a/tests/mir-opt/inline/unchecked_shifts.rs +++ b/tests/mir-opt/inline/unchecked_shifts.rs @@ -16,3 +16,15 @@ pub unsafe fn unchecked_shl_unsigned_smaller(a: u16, b: u32) -> u16 { pub unsafe fn unchecked_shr_signed_smaller(a: i16, b: u32) -> i16 { a.unchecked_shr(b) } + +// EMIT_MIR unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.diff +// EMIT_MIR unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.mir +pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 { + a.unchecked_shl(b) +} + +// EMIT_MIR unchecked_shifts.unchecked_shr_signed_bigger.Inline.diff +// EMIT_MIR unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.mir +pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 { + a.unchecked_shr(b) +} diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff new file mode 100644 index 00000000000..1ed65b310ac --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-abort.diff @@ -0,0 +1,36 @@ +- // MIR for `unchecked_shl_unsigned_bigger` before Inline ++ // MIR for `unchecked_shl_unsigned_bigger` after Inline + + fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 { + debug a => _1; + debug b => _2; + let mut _0: u64; + let mut _3: u64; + let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shl) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: u64; ++ scope 2 { ++ } ++ } + + bb0: { + StorageLive(_3); + _3 = _1; + StorageLive(_4); + _4 = _2; +- _0 = core::num::::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable]; ++ StorageLive(_5); ++ _5 = _4 as u64 (IntToInt); ++ _0 = unchecked_shl::(_3, move _5) -> [return: bb1, unwind unreachable]; + } + + bb1: { ++ StorageDead(_5); + StorageDead(_4); + StorageDead(_3); + return; + } + } + diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff new file mode 100644 index 00000000000..7a27675638b --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.Inline.panic-unwind.diff @@ -0,0 +1,36 @@ +- // MIR for `unchecked_shl_unsigned_bigger` before Inline ++ // MIR for `unchecked_shl_unsigned_bigger` after Inline + + fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 { + debug a => _1; + debug b => _2; + let mut _0: u64; + let mut _3: u64; + let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shl) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: u64; ++ scope 2 { ++ } ++ } + + bb0: { + StorageLive(_3); + _3 = _1; + StorageLive(_4); + _4 = _2; +- _0 = core::num::::unchecked_shl(move _3, move _4) -> bb1; ++ StorageLive(_5); ++ _5 = _4 as u64 (IntToInt); ++ _0 = unchecked_shl::(_3, move _5) -> [return: bb1, unwind unreachable]; + } + + bb1: { ++ StorageDead(_5); + StorageDead(_4); + StorageDead(_3); + return; + } + } + diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir new file mode 100644 index 00000000000..eee56b9560d --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-abort.mir @@ -0,0 +1,25 @@ +// MIR for `unchecked_shl_unsigned_bigger` after PreCodegen + +fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 { + debug a => _1; + debug b => _2; + let mut _0: u64; + scope 1 (inlined core::num::::unchecked_shl) { + debug self => _1; + debug rhs => _2; + let mut _3: u64; + scope 2 { + } + } + + bb0: { + StorageLive(_3); + _3 = _2 as u64 (IntToInt); + _0 = unchecked_shl::(_1, move _3) -> [return: bb1, unwind unreachable]; + } + + bb1: { + StorageDead(_3); + return; + } +} diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir new file mode 100644 index 00000000000..eee56b9560d --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_bigger.PreCodegen.after.panic-unwind.mir @@ -0,0 +1,25 @@ +// MIR for `unchecked_shl_unsigned_bigger` after PreCodegen + +fn unchecked_shl_unsigned_bigger(_1: u64, _2: u32) -> u64 { + debug a => _1; + debug b => _2; + let mut _0: u64; + scope 1 (inlined core::num::::unchecked_shl) { + debug self => _1; + debug rhs => _2; + let mut _3: u64; + scope 2 { + } + } + + bb0: { + StorageLive(_3); + _3 = _2 as u64 (IntToInt); + _0 = unchecked_shl::(_1, move _3) -> [return: bb1, unwind unreachable]; + } + + bb1: { + StorageDead(_3); + return; + } +} diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff index 093925b8e4f..6c809f0b533 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff @@ -7,16 +7,36 @@ let mut _0: u16; let mut _3: u16; let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shl) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: u16; ++ let mut _6: bool; ++ let mut _7: u32; ++ scope 2 { ++ } ++ } bb0: { StorageLive(_3); _3 = _1; StorageLive(_4); _4 = _2; - _0 = core::num::::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable]; +- _0 = core::num::::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable]; ++ StorageLive(_5); ++ StorageLive(_6); ++ StorageLive(_7); ++ _7 = const 65535_u32; ++ _6 = Le(_4, move _7); ++ StorageDead(_7); ++ assume(move _6); ++ StorageDead(_6); ++ _5 = _4 as u16 (IntToInt); ++ _0 = unchecked_shl::(_3, move _5) -> [return: bb1, unwind unreachable]; } bb1: { ++ StorageDead(_5); StorageDead(_4); StorageDead(_3); return; diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff index 50934e0439a..0753c1b05df 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff @@ -7,16 +7,36 @@ let mut _0: u16; let mut _3: u16; let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shl) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: u16; ++ let mut _6: bool; ++ let mut _7: u32; ++ scope 2 { ++ } ++ } bb0: { StorageLive(_3); _3 = _1; StorageLive(_4); _4 = _2; - _0 = core::num::::unchecked_shl(move _3, move _4) -> bb1; +- _0 = core::num::::unchecked_shl(move _3, move _4) -> bb1; ++ StorageLive(_5); ++ StorageLive(_6); ++ StorageLive(_7); ++ _7 = const 65535_u32; ++ _6 = Le(_4, move _7); ++ StorageDead(_7); ++ assume(move _6); ++ StorageDead(_6); ++ _5 = _4 as u16 (IntToInt); ++ _0 = unchecked_shl::(_3, move _5) -> [return: bb1, unwind unreachable]; } bb1: { ++ StorageDead(_5); StorageDead(_4); StorageDead(_3); return; diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir index 46f3511b14c..7bf10b365a6 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-abort.mir @@ -4,12 +4,31 @@ fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 { debug a => _1; debug b => _2; let mut _0: u16; + scope 1 (inlined core::num::::unchecked_shl) { + debug self => _1; + debug rhs => _2; + let mut _3: u32; + let mut _4: bool; + let mut _5: u16; + scope 2 { + } + } bb0: { - _0 = core::num::::unchecked_shl(_1, _2) -> [return: bb1, unwind unreachable]; + StorageLive(_5); + StorageLive(_4); + StorageLive(_3); + _3 = const 65535_u32; + _4 = Le(_2, move _3); + StorageDead(_3); + assume(move _4); + StorageDead(_4); + _5 = _2 as u16 (IntToInt); + _0 = unchecked_shl::(_1, move _5) -> [return: bb1, unwind unreachable]; } bb1: { + StorageDead(_5); return; } } diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir index 35fee449c35..7bf10b365a6 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.panic-unwind.mir @@ -4,12 +4,31 @@ fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 { debug a => _1; debug b => _2; let mut _0: u16; + scope 1 (inlined core::num::::unchecked_shl) { + debug self => _1; + debug rhs => _2; + let mut _3: u32; + let mut _4: bool; + let mut _5: u16; + scope 2 { + } + } bb0: { - _0 = core::num::::unchecked_shl(_1, _2) -> bb1; + StorageLive(_5); + StorageLive(_4); + StorageLive(_3); + _3 = const 65535_u32; + _4 = Le(_2, move _3); + StorageDead(_3); + assume(move _4); + StorageDead(_4); + _5 = _2 as u16 (IntToInt); + _0 = unchecked_shl::(_1, move _5) -> [return: bb1, unwind unreachable]; } bb1: { + StorageDead(_5); return; } } diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff new file mode 100644 index 00000000000..04ddb4e80ff --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff @@ -0,0 +1,36 @@ +- // MIR for `unchecked_shr_signed_bigger` before Inline ++ // MIR for `unchecked_shr_signed_bigger` after Inline + + fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 { + debug a => _1; + debug b => _2; + let mut _0: i64; + let mut _3: i64; + let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shr) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: i64; ++ scope 2 { ++ } ++ } + + bb0: { + StorageLive(_3); + _3 = _1; + StorageLive(_4); + _4 = _2; +- _0 = core::num::::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable]; ++ StorageLive(_5); ++ _5 = _4 as i64 (IntToInt); ++ _0 = unchecked_shr::(_3, move _5) -> [return: bb1, unwind unreachable]; + } + + bb1: { ++ StorageDead(_5); + StorageDead(_4); + StorageDead(_3); + return; + } + } + diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff new file mode 100644 index 00000000000..762aa1564b5 --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff @@ -0,0 +1,36 @@ +- // MIR for `unchecked_shr_signed_bigger` before Inline ++ // MIR for `unchecked_shr_signed_bigger` after Inline + + fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 { + debug a => _1; + debug b => _2; + let mut _0: i64; + let mut _3: i64; + let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shr) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: i64; ++ scope 2 { ++ } ++ } + + bb0: { + StorageLive(_3); + _3 = _1; + StorageLive(_4); + _4 = _2; +- _0 = core::num::::unchecked_shr(move _3, move _4) -> bb1; ++ StorageLive(_5); ++ _5 = _4 as i64 (IntToInt); ++ _0 = unchecked_shr::(_3, move _5) -> [return: bb1, unwind unreachable]; + } + + bb1: { ++ StorageDead(_5); + StorageDead(_4); + StorageDead(_3); + return; + } + } + diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir new file mode 100644 index 00000000000..858760d065c --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-abort.mir @@ -0,0 +1,25 @@ +// MIR for `unchecked_shr_signed_bigger` after PreCodegen + +fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 { + debug a => _1; + debug b => _2; + let mut _0: i64; + scope 1 (inlined core::num::::unchecked_shr) { + debug self => _1; + debug rhs => _2; + let mut _3: i64; + scope 2 { + } + } + + bb0: { + StorageLive(_3); + _3 = _2 as i64 (IntToInt); + _0 = unchecked_shr::(_1, move _3) -> [return: bb1, unwind unreachable]; + } + + bb1: { + StorageDead(_3); + return; + } +} diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir new file mode 100644 index 00000000000..858760d065c --- /dev/null +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.PreCodegen.after.panic-unwind.mir @@ -0,0 +1,25 @@ +// MIR for `unchecked_shr_signed_bigger` after PreCodegen + +fn unchecked_shr_signed_bigger(_1: i64, _2: u32) -> i64 { + debug a => _1; + debug b => _2; + let mut _0: i64; + scope 1 (inlined core::num::::unchecked_shr) { + debug self => _1; + debug rhs => _2; + let mut _3: i64; + scope 2 { + } + } + + bb0: { + StorageLive(_3); + _3 = _2 as i64 (IntToInt); + _0 = unchecked_shr::(_1, move _3) -> [return: bb1, unwind unreachable]; + } + + bb1: { + StorageDead(_3); + return; + } +} diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff index 1659a51b090..5739336cb4f 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff @@ -7,16 +7,36 @@ let mut _0: i16; let mut _3: i16; let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shr) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: i16; ++ let mut _6: bool; ++ let mut _7: u32; ++ scope 2 { ++ } ++ } bb0: { StorageLive(_3); _3 = _1; StorageLive(_4); _4 = _2; - _0 = core::num::::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable]; +- _0 = core::num::::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable]; ++ StorageLive(_5); ++ StorageLive(_6); ++ StorageLive(_7); ++ _7 = const 32767_u32; ++ _6 = Le(_4, move _7); ++ StorageDead(_7); ++ assume(move _6); ++ StorageDead(_6); ++ _5 = _4 as i16 (IntToInt); ++ _0 = unchecked_shr::(_3, move _5) -> [return: bb1, unwind unreachable]; } bb1: { ++ StorageDead(_5); StorageDead(_4); StorageDead(_3); return; diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff index cb5ec37feb3..e04912e1d1c 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-unwind.diff @@ -7,16 +7,36 @@ let mut _0: i16; let mut _3: i16; let mut _4: u32; ++ scope 1 (inlined core::num::::unchecked_shr) { ++ debug self => _3; ++ debug rhs => _4; ++ let mut _5: i16; ++ let mut _6: bool; ++ let mut _7: u32; ++ scope 2 { ++ } ++ } bb0: { StorageLive(_3); _3 = _1; StorageLive(_4); _4 = _2; - _0 = core::num::::unchecked_shr(move _3, move _4) -> bb1; +- _0 = core::num::::unchecked_shr(move _3, move _4) -> bb1; ++ StorageLive(_5); ++ StorageLive(_6); ++ StorageLive(_7); ++ _7 = const 32767_u32; ++ _6 = Le(_4, move _7); ++ StorageDead(_7); ++ assume(move _6); ++ StorageDead(_6); ++ _5 = _4 as i16 (IntToInt); ++ _0 = unchecked_shr::(_3, move _5) -> [return: bb1, unwind unreachable]; } bb1: { ++ StorageDead(_5); StorageDead(_4); StorageDead(_3); return; diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir index 9f2f40002a3..08b044f4f9e 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-abort.mir @@ -4,12 +4,31 @@ fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 { debug a => _1; debug b => _2; let mut _0: i16; + scope 1 (inlined core::num::::unchecked_shr) { + debug self => _1; + debug rhs => _2; + let mut _3: u32; + let mut _4: bool; + let mut _5: i16; + scope 2 { + } + } bb0: { - _0 = core::num::::unchecked_shr(_1, _2) -> [return: bb1, unwind unreachable]; + StorageLive(_5); + StorageLive(_4); + StorageLive(_3); + _3 = const 32767_u32; + _4 = Le(_2, move _3); + StorageDead(_3); + assume(move _4); + StorageDead(_4); + _5 = _2 as i16 (IntToInt); + _0 = unchecked_shr::(_1, move _5) -> [return: bb1, unwind unreachable]; } bb1: { + StorageDead(_5); return; } } diff --git a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir index aaf3bb62e8a..08b044f4f9e 100644 --- a/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir +++ b/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir @@ -4,12 +4,31 @@ fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 { debug a => _1; debug b => _2; let mut _0: i16; + scope 1 (inlined core::num::::unchecked_shr) { + debug self => _1; + debug rhs => _2; + let mut _3: u32; + let mut _4: bool; + let mut _5: i16; + scope 2 { + } + } bb0: { - _0 = core::num::::unchecked_shr(_1, _2) -> bb1; + StorageLive(_5); + StorageLive(_4); + StorageLive(_3); + _3 = const 32767_u32; + _4 = Le(_2, move _3); + StorageDead(_3); + assume(move _4); + StorageDead(_4); + _5 = _2 as i16 (IntToInt); + _0 = unchecked_shr::(_1, move _5) -> [return: bb1, unwind unreachable]; } bb1: { + StorageDead(_5); return; } } diff --git a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir index 10b93a15799..1a7d5433e35 100644 --- a/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir +++ b/tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir @@ -7,17 +7,17 @@ fn checked_shl(_1: u32, _2: u32) -> Option { scope 1 (inlined core::num::::checked_shl) { debug self => _1; debug rhs => _2; - let mut _11: u32; - let mut _12: bool; + let mut _7: u32; + let mut _8: bool; scope 2 { - debug a => _11; - debug b => _10; + debug a => _7; + debug b => _6; } scope 3 (inlined core::num::::overflowing_shl) { debug self => _1; debug rhs => _2; - let mut _9: u32; - let mut _10: bool; + let mut _5: u32; + let mut _6: bool; scope 4 (inlined core::num::::wrapping_shl) { debug self => _1; debug rhs => _2; @@ -27,52 +27,7 @@ fn checked_shl(_1: u32, _2: u32) -> Option { scope 6 (inlined core::num::::unchecked_shl) { debug self => _1; debug rhs => _4; - let mut _8: u32; scope 7 { - scope 8 (inlined core::num::::unchecked_shl::conv) { - debug x => _4; - let mut _5: std::result::Result; - let mut _7: std::option::Option; - scope 9 { - scope 10 (inlined >::try_into) { - debug self => _4; - scope 11 (inlined >::try_from) { - debug value => _4; - scope 12 (inlined >::into) { - debug self => _4; - scope 13 (inlined >::from) { - debug t => _4; - } - } - } - } - scope 14 (inlined Result::::ok) { - debug self => _5; - let _6: u32; - scope 15 { - debug x => _6; - } - } - scope 16 (inlined #[track_caller] Option::::unwrap_unchecked) { - debug self => _7; - let mut _13: &std::option::Option; - scope 17 { - debug val => _8; - } - scope 18 { - scope 20 (inlined unreachable_unchecked) { - scope 21 { - scope 22 (inlined unreachable_unchecked::runtime) { - } - } - } - } - scope 19 (inlined Option::::is_some) { - debug self => _13; - } - } - } - } } } } @@ -81,46 +36,32 @@ fn checked_shl(_1: u32, _2: u32) -> Option { } bb0: { - StorageLive(_10); - StorageLive(_11); - StorageLive(_9); + StorageLive(_6); + StorageLive(_7); + StorageLive(_5); StorageLive(_4); StorageLive(_3); _3 = const 31_u32; _4 = BitAnd(_2, move _3); StorageDead(_3); - StorageLive(_8); - StorageLive(_7); - StorageLive(_5); - _5 = Result::::Ok(_4); - StorageLive(_6); - _6 = move ((_5 as Ok).0: u32); - _7 = Option::::Some(move _6); - StorageDead(_6); - StorageDead(_5); - StorageLive(_13); - _8 = move ((_7 as Some).0: u32); - StorageDead(_13); - StorageDead(_7); - _9 = unchecked_shl::(_1, move _8) -> [return: bb1, unwind unreachable]; + _5 = unchecked_shl::(_1, _4) -> [return: bb1, unwind unreachable]; } bb1: { - StorageDead(_8); StorageDead(_4); - _10 = Ge(_2, const _); - _11 = move _9; - StorageDead(_9); - StorageLive(_12); - _12 = unlikely(_10) -> [return: bb2, unwind unreachable]; + _6 = Ge(_2, const _); + _7 = move _5; + StorageDead(_5); + StorageLive(_8); + _8 = unlikely(_6) -> [return: bb2, unwind unreachable]; } bb2: { - switchInt(move _12) -> [0: bb3, otherwise: bb4]; + switchInt(move _8) -> [0: bb3, otherwise: bb4]; } bb3: { - _0 = Option::::Some(_11); + _0 = Option::::Some(_7); goto -> bb5; } @@ -130,9 +71,9 @@ fn checked_shl(_1: u32, _2: u32) -> Option { } bb5: { - StorageDead(_12); - StorageDead(_11); - StorageDead(_10); + StorageDead(_8); + StorageDead(_7); + StorageDead(_6); return; } }