Auto merge of #115547 - WaffleLapkin:spin_looping, r=Mark-Simulacrum
Simplify `core::hint::spin_loop` The grouping was inconsistent and not really helpful. r? t-libs
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commit
8a7cab8d0e
@ -175,35 +175,28 @@ pub fn spin_loop() {
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unsafe { crate::arch::x86_64::_mm_pause() };
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unsafe { crate::arch::x86_64::_mm_pause() };
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}
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}
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// RISC-V platform spin loop hint implementation
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{
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// RISC-V RV32 and RV64 share the same PAUSE instruction, but they are located in different
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// modules in `core::arch`.
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// In this case, here we call `pause` function in each core arch module.
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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{
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{
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crate::arch::riscv32::pause();
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crate::arch::riscv32::pause();
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}
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}
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#[cfg(target_arch = "riscv64")]
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#[cfg(target_arch = "riscv64")]
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{
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{
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crate::arch::riscv64::pause();
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crate::arch::riscv64::pause();
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}
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}
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}
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#[cfg(any(target_arch = "aarch64", all(target_arch = "arm", target_feature = "v6")))]
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{
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#[cfg(target_arch = "aarch64")]
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#[cfg(target_arch = "aarch64")]
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{
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{
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// SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets.
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// SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets.
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unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) };
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unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) };
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}
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}
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#[cfg(target_arch = "arm")]
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#[cfg(all(target_arch = "arm", target_feature = "v6"))]
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{
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{
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// SAFETY: the `cfg` attr ensures that we only execute this on arm targets
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// SAFETY: the `cfg` attr ensures that we only execute this on arm targets
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// with support for the v6 feature.
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// with support for the v6 feature.
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unsafe { crate::arch::arm::__yield() };
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unsafe { crate::arch::arm::__yield() };
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}
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}
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}
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}
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}
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/// An identity function that *__hints__* to the compiler to be maximally pessimistic about what
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/// An identity function that *__hints__* to the compiler to be maximally pessimistic about what
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