Merge pull request #1491 from folkertdev/add-llvm-avx2-permd
add `llvm.x86.avx2.permd` intrinsic
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commit
893ba536bc
@ -244,6 +244,7 @@ unsafe fn test_simd() {
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test_mm256_shuffle_epi8();
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test_mm256_permute2x128_si256();
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test_mm256_permutevar8x32_epi32();
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#[rustfmt::skip]
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let mask1 = _mm_movemask_epi8(dbg!(_mm_setr_epi8(255u8 as i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)));
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@ -447,6 +448,16 @@ unsafe fn test_mm256_permute2x128_si256() {
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assert_eq_m256i(r, e);
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}
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#[cfg(target_arch = "x86_64")]
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#[target_feature(enable = "avx2")]
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unsafe fn test_mm256_permutevar8x32_epi32() {
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let a = _mm256_setr_epi32(100, 200, 300, 400, 500, 600, 700, 800);
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let idx = _mm256_setr_epi32(7, 6, 5, 4, 3, 2, 1, 0);
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let r = _mm256_setr_epi32(800, 700, 600, 500, 400, 300, 200, 100);
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let e = _mm256_permutevar8x32_epi32(a, idx);
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assert_eq_m256i(r, e);
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}
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fn test_checked_mul() {
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let u: Option<u8> = u8::from_str_radix("1000", 10).ok();
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assert_eq!(u, None);
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@ -374,6 +374,21 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
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}
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}
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}
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"llvm.x86.avx2.permd" => {
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// https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_permutevar8x32_epi32
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intrinsic_args!(fx, args => (a, idx); intrinsic);
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for j in 0..=7 {
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let index = idx.value_typed_lane(fx, fx.tcx.types.u32, j).load_scalar(fx);
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let index = fx.bcx.ins().uextend(fx.pointer_type, index);
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let value = a.value_lane_dyn(fx, index).load_scalar(fx);
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ret.place_typed_lane(fx, fx.tcx.types.u32, j).to_ptr().store(
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fx,
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value,
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MemFlags::trusted(),
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);
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}
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}
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"llvm.x86.avx2.vperm2i128"
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| "llvm.x86.avx.vperm2f128.ps.256"
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| "llvm.x86.avx.vperm2f128.pd.256" => {
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