Move data_race and weak_memory into a submodule

src/concurrency/data_race.rs

@@ -100,10 +100,10 @@ pub enum AtomicFenceOp {
 /// of a thread, contains the happens-before clock and
 /// additional metadata to model atomic fence operations.
 #[derive(Clone, Default, Debug)]
-pub struct ThreadClockSet {
+pub(super) struct ThreadClockSet {
     /// The increasing clock representing timestamps
     /// that happen-before this thread.
-    pub(crate) clock: VClock,
+    pub(super) clock: VClock,
 
     /// The set of timestamps that will happen-before this
     /// thread once it performs an acquire fence.
@@ -115,15 +115,15 @@ pub struct ThreadClockSet {
 
     /// Timestamps of the last SC fence performed by each
     /// thread, updated when this thread performs an SC fence
-    pub(crate) fence_seqcst: VClock,
+    pub(super) fence_seqcst: VClock,
 
     /// Timestamps of the last SC write performed by each
     /// thread, updated when this thread performs an SC fence
-    pub(crate) write_seqcst: VClock,
+    pub(super) write_seqcst: VClock,
 
     /// Timestamps of the last SC fence performed by each
     /// thread, updated when this thread performs an SC read
-    pub(crate) read_seqcst: VClock,
+    pub(super) read_seqcst: VClock,
 }
 
 impl ThreadClockSet {
@@ -166,7 +166,7 @@ pub struct DataRace;
 /// common case where no atomic operations
 /// exists on the memory cell.
 #[derive(Clone, PartialEq, Eq, Default, Debug)]
-pub struct AtomicMemoryCellClocks {
+struct AtomicMemoryCellClocks {
     /// The clock-vector of the timestamp of the last atomic
     /// read operation performed by each thread.
     /// This detects potential data-races between atomic read
@@ -1547,7 +1547,7 @@ impl GlobalState {
     /// Load the current vector clock in use and the current set of thread clocks
     /// in use for the vector.
     #[inline]
-    pub fn current_thread_state(&self) -> (VectorIdx, Ref<'_, ThreadClockSet>) {
+    pub(super) fn current_thread_state(&self) -> (VectorIdx, Ref<'_, ThreadClockSet>) {
         let index = self.current_index();
         let ref_vector = self.vector_clocks.borrow();
         let clocks = Ref::map(ref_vector, |vec| &vec[index]);
@@ -1557,7 +1557,7 @@ impl GlobalState {
     /// Load the current vector clock in use and the current set of thread clocks
     /// in use for the vector mutably for modification.
     #[inline]
-    pub fn current_thread_state_mut(&self) -> (VectorIdx, RefMut<'_, ThreadClockSet>) {
+    pub(super) fn current_thread_state_mut(&self) -> (VectorIdx, RefMut<'_, ThreadClockSet>) {
         let index = self.current_index();
         let ref_vector = self.vector_clocks.borrow_mut();
         let clocks = RefMut::map(ref_vector, |vec| &mut vec[index]);

src/concurrency/mod.rs

@@ -0,0 +1,3 @@
+mod allocation_map;
+pub mod data_race;
+pub mod weak_memory;

src/concurrency/weak_memory.rs

@@ -60,10 +60,11 @@ use std::{
 use rustc_const_eval::interpret::{AllocRange, InterpResult, ScalarMaybeUninit};
 use rustc_data_structures::fx::FxHashMap;
 
-use crate::{
+use crate::{Tag, VClock, VTimestamp, VectorIdx};
+
+use super::{
     allocation_map::{AccessType, AllocationMap},
     data_race::{GlobalState, ThreadClockSet},
-    Tag, VClock, VTimestamp, VectorIdx,
 };
 
 pub type AllocExtra = StoreBufferAlloc;
@@ -82,7 +83,7 @@ pub struct StoreBufferAlloc {
 }
 
 #[derive(Debug, Clone, PartialEq, Eq)]
-pub struct StoreBuffer {
+pub(super) struct StoreBuffer {
     // Stores to this location in modification order
     buffer: VecDeque<StoreElement>,
 }
@@ -112,7 +113,7 @@ impl StoreBufferAlloc {
     }
 
     /// Gets a store buffer associated with an atomic object in this allocation
-    pub fn get_store_buffer(&self, range: AllocRange) -> Ref<'_, StoreBuffer> {
+    pub(super) fn get_store_buffer(&self, range: AllocRange) -> Ref<'_, StoreBuffer> {
         let access_type = self.store_buffer.borrow().access_type(range);
         let index = match access_type {
             AccessType::PerfectlyOverlapping(index) => index,
@@ -143,7 +144,7 @@ impl StoreBufferAlloc {
     }
 
     /// Gets a mutable store buffer associated with an atomic object in this allocation
-    pub fn get_store_buffer_mut(&mut self, range: AllocRange) -> &mut StoreBuffer {
+    pub(super) fn get_store_buffer_mut(&mut self, range: AllocRange) -> &mut StoreBuffer {
         let buffer = self.store_buffer.get_mut();
         let access_type = buffer.access_type(range);
         let index = match access_type {
@@ -174,7 +175,7 @@ impl Default for StoreBuffer {
 
 impl<'mir, 'tcx: 'mir> StoreBuffer {
     /// Reads from the last store in modification order
-    pub fn read_from_last_store(&self, global: &GlobalState) {
+    pub(super) fn read_from_last_store(&self, global: &GlobalState) {
         let store_elem = self.buffer.back();
         if let Some(store_elem) = store_elem {
             let (index, clocks) = global.current_thread_state();
@@ -182,7 +183,7 @@ impl<'mir, 'tcx: 'mir> StoreBuffer {
         }
     }
 
-    pub fn buffered_read(
+    pub(super) fn buffered_read(
         &self,
         global: &GlobalState,
         is_seqcst: bool,
@@ -213,7 +214,7 @@ impl<'mir, 'tcx: 'mir> StoreBuffer {
         Ok(loaded)
     }
 
-    pub fn buffered_write(
+    pub(super) fn buffered_write(
         &mut self,
         val: ScalarMaybeUninit<Tag>,
         global: &GlobalState,

src/lib.rs

@@ -31,8 +31,7 @@ extern crate rustc_session;
 extern crate rustc_span;
 extern crate rustc_target;
 
-mod allocation_map;
-mod data_race;
+mod concurrency;
 mod diagnostics;
 mod eval;
 mod helpers;
@@ -46,7 +45,6 @@ mod stacked_borrows;
 mod sync;
 mod thread;
 mod vector_clock;
-mod weak_memory;
 
 // Establish a "crate-wide prelude": we often import `crate::*`.
 
@@ -65,7 +63,7 @@ pub use crate::shims::time::EvalContextExt as _;
 pub use crate::shims::tls::{EvalContextExt as _, TlsData};
 pub use crate::shims::EvalContextExt as _;
 
-pub use crate::data_race::{
+pub use crate::concurrency::data_race::{
     AtomicFenceOp, AtomicReadOp, AtomicRwOp, AtomicWriteOp,
     EvalContextExt as DataRaceEvalContextExt,
 };

src/machine.rs

@@ -28,7 +28,11 @@ use rustc_span::Symbol;
 use rustc_target::abi::Size;
 use rustc_target::spec::abi::Abi;
 
-use crate::{shims::unix::FileHandler, *};
+use crate::{
+    concurrency::{data_race, weak_memory},
+    shims::unix::FileHandler,
+    *,
+};
 
 // Some global facts about the emulated machine.
 pub const PAGE_SIZE: u64 = 4 * 1024; // FIXME: adjust to target architecture

src/thread.rs

@@ -12,6 +12,7 @@ use rustc_hir::def_id::DefId;
 use rustc_index::vec::{Idx, IndexVec};
 use rustc_middle::mir::Mutability;
 
+use crate::concurrency::data_race;
 use crate::sync::SynchronizationState;
 use crate::*;