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Auto merge of #78066 - bugadani:wat, r=jonas-schievink

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Clean up small, surprising bits of code

This PR clean up a small number of unrelated, small things I found while browsing the code base.
This commit is contained in:
bors 2020-10-18 13:50:31 +00:00
commit 834821e3b6
6 changed files with 49 additions and 54 deletions
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2
compiler/rustc_ast/src/util/lev_distance.rs
View File

@ -54,7 +54,7 @@ pub fn find_best_match_for_name<'a, T>(
T: Iterator<Item = &'a Symbol>,
{
let lookup = &lookup.as_str();
let max_dist = dist.map_or_else(|| cmp::max(lookup.len(), 3) / 3, |d| d);
let max_dist = dist.unwrap_or_else(|| cmp::max(lookup.len(), 3) / 3);
let name_vec: Vec<&Symbol> = iter_names.collect();
let (case_insensitive_match, levenshtein_match) = name_vec

85
compiler/rustc_ast_lowering/src/expr.rs
View File

@ -1190,52 +1190,47 @@ fn lower_expr_asm(&mut self, sp: Span, asm: &InlineAsm) -> hir::ExprKind<'hir> {
input| {
match used_regs.entry(r) {
Entry::Occupied(o) => {
if !skip {
skip = true;
let idx2 = *o.get();
let op2 = &operands[idx2];
let op_sp2 = asm.operands[idx2].1;
let reg2 = match op2.reg() {
Some(asm::InlineAsmRegOrRegClass::Reg(r)) => r,
_ => unreachable!(),
};
let msg = format!(
"register `{}` conflicts with register `{}`",
reg.name(),
reg2.name()
);
let mut err = sess.struct_span_err(op_sp, &msg);
err.span_label(
op_sp,
&format!("register `{}`", reg.name()),
);
err.span_label(
op_sp2,
&format!("register `{}`", reg2.name()),
);
match (op, op2) {
(
hir::InlineAsmOperand::In { .. },
hir::InlineAsmOperand::Out { late, .. },
)
| (
hir::InlineAsmOperand::Out { late, .. },
hir::InlineAsmOperand::In { .. },
) => {
assert!(!*late);
let out_op_sp = if input { op_sp2 } else { op_sp };
let msg = "use `lateout` instead of \
`out` to avoid conflict";
err.span_help(out_op_sp, msg);
}
_ => {}
}
err.emit();
if skip {
return;
}
skip = true;
let idx2 = *o.get();
let op2 = &operands[idx2];
let op_sp2 = asm.operands[idx2].1;
let reg2 = match op2.reg() {
Some(asm::InlineAsmRegOrRegClass::Reg(r)) => r,
_ => unreachable!(),
};
let msg = format!(
"register `{}` conflicts with register `{}`",
reg.name(),
reg2.name()
);
let mut err = sess.struct_span_err(op_sp, &msg);
err.span_label(op_sp, &format!("register `{}`", reg.name()));
err.span_label(op_sp2, &format!("register `{}`", reg2.name()));
match (op, op2) {
(
hir::InlineAsmOperand::In { .. },
hir::InlineAsmOperand::Out { late, .. },
)
| (
hir::InlineAsmOperand::Out { late, .. },
hir::InlineAsmOperand::In { .. },
) => {
assert!(!*late);
let out_op_sp = if input { op_sp2 } else { op_sp };
let msg = "use `lateout` instead of \
`out` to avoid conflict";
err.span_help(out_op_sp, msg);
}
_ => {}
}
err.emit();
}
Entry::Vacant(v) => {
v.insert(idx);

2
compiler/rustc_lint/src/builtin.rs
View File

@ -968,7 +968,7 @@ fn warn_if_doc(cx: &EarlyContext<'_>, node_span: Span, node_kind: &str, attrs: &
while let Some(attr) = attrs.next() {
if attr.is_doc_comment() {
sugared_span =
Some(sugared_span.map_or_else(|| attr.span, |span| span.with_hi(attr.span.hi())));
Some(sugared_span.map_or(attr.span, |span| span.with_hi(attr.span.hi())));
}
if attrs.peek().map(|next_attr| next_attr.is_doc_comment()).unwrap_or_default() {

2
compiler/rustc_middle/src/hir/place.rs
View File

@ -103,7 +103,7 @@ pub fn deref_tys(&self) -> impl Iterator<Item = Ty<'tcx>> + '_ {
/// Returns the type of this `Place` after all projections have been applied.
pub fn ty(&self) -> Ty<'tcx> {
self.projections.last().map_or_else(|| self.base_ty, |proj| proj.ty)
self.projections.last().map_or(self.base_ty, |proj| proj.ty)
}
/// Returns the type of this `Place` immediately before `projection_index`th projection

6
compiler/rustc_mir/src/borrow_check/type_check/input_output.rs
View File

@ -73,7 +73,7 @@ pub(super) fn equate_inputs_and_outputs(
);
// Equate expected input tys with those in the MIR.
for (&normalized_input_ty, argument_index) in normalized_input_tys.iter().zip(0..) {
for (argument_index, &normalized_input_ty) in normalized_input_tys.iter().enumerate() {
// In MIR, argument N is stored in local N+1.
let local = Local::new(argument_index + 1);
@ -87,8 +87,8 @@ pub(super) fn equate_inputs_and_outputs(
}
if let Some(user_provided_sig) = user_provided_sig {
for (&user_provided_input_ty, argument_index) in
user_provided_sig.inputs().iter().zip(0..)
for (argument_index, &user_provided_input_ty) in
user_provided_sig.inputs().iter().enumerate()
{
// In MIR, closures begin an implicit `self`, so
// argument N is stored in local N+2.

6
compiler/rustc_passes/src/dead.rs
View File

@ -458,8 +458,8 @@ fn create_and_seed_worklist<'tcx>(
.map
.iter()
.filter_map(
|(&id, level)| {
if level >= &privacy::AccessLevel::Reachable { Some(id) } else { None }
|(&id, &level)| {
if level >= privacy::AccessLevel::Reachable { Some(id) } else { None }
},
)
.chain(
@ -547,7 +547,7 @@ fn symbol_is_live(&mut self, id: hir::HirId) -> bool {
let def_id = self.tcx.hir().local_def_id(id);
let inherent_impls = self.tcx.inherent_impls(def_id);
for &impl_did in inherent_impls.iter() {
for &item_did in &self.tcx.associated_item_def_ids(impl_did)[..] {
for item_did in self.tcx.associated_item_def_ids(impl_did) {
if let Some(did) = item_did.as_local() {
let item_hir_id = self.tcx.hir().local_def_id_to_hir_id(did);
if self.live_symbols.contains(&item_hir_id) {