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Auto merge of #1874 - steffahn:a_an, r=RalfJung

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Fix typos “a”→“an”

See rust-lang/rust#88230
This commit is contained in:
bors 2021-08-22 16:31:12 +00:00
commit 7ec2bee723
2 changed files with 5 additions and 5 deletions
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8
src/data_race.rs
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@ -42,7 +42,7 @@
//! order exists in which all threads observe all modifications in the same //! order exists in which all threads observe all modifications in the same
//! order (see Sequentially-consistent ordering below) " //! order (see Sequentially-consistent ordering below) "
//! So in the absence of weak memory effects a seq-cst load & a seq-cst store is identical //! So in the absence of weak memory effects a seq-cst load & a seq-cst store is identical
//! to a acquire load and a release store given the global sequentially consistent order //! to an acquire load and a release store given the global sequentially consistent order
//! of the schedule. //! of the schedule.
//! //!
//! The timestamps used in the data-race detector assign each sequence of non-atomic operations //! The timestamps used in the data-race detector assign each sequence of non-atomic operations
@ -142,7 +142,7 @@ fn apply_release_fence(&mut self) {
self.fence_release.clone_from(&self.clock); self.fence_release.clone_from(&self.clock);
} }
/// Apply the effects of a acquire fence to this /// Apply the effects of an acquire fence to this
/// set of thread vector clocks. /// set of thread vector clocks.
#[inline] #[inline]
fn apply_acquire_fence(&mut self) { fn apply_acquire_fence(&mut self) {
@ -503,7 +503,7 @@ fn write_scalar_atomic(
this.validate_atomic_store(dest, atomic) this.validate_atomic_store(dest, atomic)
} }
/// Perform a atomic operation on a memory location. /// Perform an atomic operation on a memory location.
fn atomic_op_immediate( fn atomic_op_immediate(
&mut self, &mut self,
place: &MPlaceTy<'tcx, Tag>, place: &MPlaceTy<'tcx, Tag>,
@ -695,7 +695,7 @@ fn validate_atomic_fence(&mut self, atomic: AtomicFenceOp) -> InterpResult<'tcx>
log::trace!("Atomic fence on {:?} with ordering {:?}", index, atomic); log::trace!("Atomic fence on {:?} with ordering {:?}", index, atomic);
// Apply data-race detection for the current fences // Apply data-race detection for the current fences
// this treats AcqRel and SeqCst as the same as a acquire // this treats AcqRel and SeqCst as the same as an acquire
// and release fence applied in the same timestamp. // and release fence applied in the same timestamp.
if atomic != AtomicFenceOp::Release { if atomic != AtomicFenceOp::Release {
// Either Acquire | AcqRel | SeqCst // Either Acquire | AcqRel | SeqCst

2
src/helpers.rs
View File

@ -78,7 +78,7 @@ fn eval_windows(&mut self, module: &str, name: &str) -> InterpResult<'tcx, Scala
self.eval_context_mut().eval_path_scalar(&["std", "sys", "windows", module, name]) self.eval_context_mut().eval_path_scalar(&["std", "sys", "windows", module, name])
} }
/// Helper function to get a `windows` constant as an `u64`. /// Helper function to get a `windows` constant as a `u64`.
fn eval_windows_u64(&mut self, module: &str, name: &str) -> InterpResult<'tcx, u64> { fn eval_windows_u64(&mut self, module: &str, name: &str) -> InterpResult<'tcx, u64> {
// TODO: Cache the result. // TODO: Cache the result.
self.eval_windows(module, name)?.to_u64() self.eval_windows(module, name)?.to_u64()