diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs
index f25505f7c59..0ddc3e1b395 100644
--- a/crates/core_simd/src/vector.rs
+++ b/crates/core_simd/src/vector.rs
@@ -368,7 +368,7 @@ pub unsafe fn gather_select_unchecked(
         unsafe { Self::gather_select_ptr(ptrs, enable, or) }
     }
 
-    /// Read pointers elementwise into a SIMD vector vector.
+    /// Read pointers elementwise into a SIMD vector.
     ///
     /// # Safety
     ///
@@ -398,7 +398,7 @@ pub unsafe fn gather_ptr(source: Simd<*const T, LANES>) -> Self
         unsafe { Self::gather_select_ptr(source, Mask::splat(true), Self::default()) }
     }
 
-    /// Conditionally read pointers elementwise into a SIMD vector vector.
+    /// Conditionally read pointers elementwise into a SIMD vector.
     /// The mask `enable`s all `true` lanes and disables all `false` lanes.
     /// If a lane is disabled, the lane is selected from the `or` vector and no read is performed.
     ///
@@ -541,7 +541,7 @@ pub unsafe fn scatter_select_unchecked(
         }
     }
 
-    /// Write pointers elementwise into a SIMD vector vector.
+    /// Write pointers elementwise into a SIMD vector.
     ///
     /// # Safety
     ///
@@ -566,7 +566,7 @@ pub unsafe fn scatter_ptr(self, dest: Simd<*mut T, LANES>) {
         unsafe { self.scatter_select_ptr(dest, Mask::splat(true)) }
     }
 
-    /// Conditionally write pointers elementwise into a SIMD vector vector.
+    /// Conditionally write pointers elementwise into a SIMD vector.
     /// The mask `enable`s all `true` lanes and disables all `false` lanes.
     /// If a lane is disabled, the write to that lane is skipped.
     ///