Add AIX Calling Convention
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@ -10,6 +10,7 @@ use crate::spec::HasTargetSpec;
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enum ABI {
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ELFv1, // original ABI used for powerpc64 (big-endian)
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ELFv2, // newer ABI used for powerpc64le and musl (both endians)
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AIX, // used by AIX OS, big-endian only
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}
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use ABI::*;
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@ -23,9 +24,9 @@ where
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C: HasDataLayout,
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{
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arg.layout.homogeneous_aggregate(cx).ok().and_then(|ha| ha.unit()).and_then(|unit| {
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// ELFv1 only passes one-member aggregates transparently.
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// ELFv1 and AIX only passes one-member aggregates transparently.
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// ELFv2 passes up to eight uniquely addressable members.
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if (abi == ELFv1 && arg.layout.size > unit.size)
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if ((abi == ELFv1 || abi == AIX) && arg.layout.size > unit.size)
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|| arg.layout.size > unit.size.checked_mul(8, cx).unwrap()
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{
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return None;
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@ -55,8 +56,14 @@ where
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return;
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}
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// See https://github.com/llvm/llvm-project/blob/main/clang/lib/CodeGen/Targets/PPC.cpp.
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if !is_ret && abi == AIX {
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arg.make_indirect_byval(None);
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return;
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}
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// The ELFv1 ABI doesn't return aggregates in registers
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if is_ret && abi == ELFv1 {
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if is_ret && (abi == ELFv1 || abi == AIX) {
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arg.make_indirect();
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return;
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}
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@ -93,6 +100,8 @@ where
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{
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let abi = if cx.target_spec().env == "musl" {
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ELFv2
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} else if cx.target_spec().os == "aix" {
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AIX
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} else {
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match cx.data_layout().endian {
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Endian::Big => ELFv1,
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