Auto merge of #2222 - InfRandomness:cargo-docs, r=RalfJung
Add mandatory cargo_doc
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7656fc45cf
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.github/workflows/ci.yml
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.github/workflows/ci.yml
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@ -87,7 +87,7 @@ jobs:
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run: bash ./ci.sh
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run: bash ./ci.sh
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clippy:
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clippy:
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name: clippy
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name: clippy + rustdoc
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runs-on: ubuntu-latest
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runs-on: ubuntu-latest
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steps:
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steps:
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- uses: actions/checkout@v3
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- uses: actions/checkout@v3
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@ -102,6 +102,8 @@ jobs:
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# run: cargo clippy --manifest-path ui_test/Cargo.toml --all-targets -- -D warnings
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# run: cargo clippy --manifest-path ui_test/Cargo.toml --all-targets -- -D warnings
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- name: Clippy (cargo-miri)
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- name: Clippy (cargo-miri)
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run: cargo clippy --manifest-path cargo-miri/Cargo.toml --all-targets -- -D warnings
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run: cargo clippy --manifest-path cargo-miri/Cargo.toml --all-targets -- -D warnings
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- name: Rustdoc
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run: RUSTDOCFLAGS="-Dwarnings" cargo doc --document-private-items
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fmt:
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fmt:
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name: formatting (ignored by bors)
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name: formatting (ignored by bors)
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@ -1,13 +1,13 @@
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//! Implementation of C++11-consistent weak memory emulation using store buffers
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//! Implementation of C++11-consistent weak memory emulation using store buffers
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//! based on Dynamic Race Detection for C++ ("the paper"):
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//! based on Dynamic Race Detection for C++ ("the paper"):
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//! https://www.doc.ic.ac.uk/~afd/homepages/papers/pdfs/2017/POPL.pdf
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//! <https://www.doc.ic.ac.uk/~afd/homepages/papers/pdfs/2017/POPL.pdf>
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//!
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//!
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//! This implementation will never generate weak memory behaviours forbidden by the C++11 model,
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//! This implementation will never generate weak memory behaviours forbidden by the C++11 model,
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//! but it is incapable of producing all possible weak behaviours allowed by the model. There are
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//! but it is incapable of producing all possible weak behaviours allowed by the model. There are
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//! certain weak behaviours observable on real hardware but not while using this.
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//! certain weak behaviours observable on real hardware but not while using this.
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//!
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//!
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//! Note that this implementation does not take into account of C++20's memory model revision to SC accesses
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//! Note that this implementation does not take into account of C++20's memory model revision to SC accesses
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//! and fences introduced by P0668 (https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0668r5.html).
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//! and fences introduced by P0668 (<https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0668r5.html>).
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//! This implementation is not fully correct under the revised C++20 model and may generate behaviours C++20
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//! This implementation is not fully correct under the revised C++20 model and may generate behaviours C++20
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//! disallows.
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//! disallows.
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//!
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//!
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@ -15,14 +15,14 @@
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//! std::atomic<T> API). It is therefore possible for this implementation to generate behaviours never observable when the
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//! std::atomic<T> API). It is therefore possible for this implementation to generate behaviours never observable when the
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//! same program is compiled and run natively. Unfortunately, no literature exists at the time of writing which proposes
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//! same program is compiled and run natively. Unfortunately, no literature exists at the time of writing which proposes
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//! an implementable and C++20-compatible relaxed memory model that supports all atomic operation existing in Rust. The closest one is
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//! an implementable and C++20-compatible relaxed memory model that supports all atomic operation existing in Rust. The closest one is
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//! A Promising Semantics for Relaxed-Memory Concurrency by Jeehoon Kang et al. (https://www.cs.tau.ac.il/~orilahav/papers/popl17.pdf)
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//! A Promising Semantics for Relaxed-Memory Concurrency by Jeehoon Kang et al. (<https://www.cs.tau.ac.il/~orilahav/papers/popl17.pdf>)
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//! However, this model lacks SC accesses and is therefore unusable by Miri (SC accesses are everywhere in library code).
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//! However, this model lacks SC accesses and is therefore unusable by Miri (SC accesses are everywhere in library code).
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//!
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//!
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//! If you find anything that proposes a relaxed memory model that is C++20-consistent, supports all orderings Rust's atomic accesses
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//! If you find anything that proposes a relaxed memory model that is C++20-consistent, supports all orderings Rust's atomic accesses
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//! and fences accept, and is implementable (with operational semanitcs), please open a GitHub issue!
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//! and fences accept, and is implementable (with operational semanitcs), please open a GitHub issue!
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//!
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//!
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//! One characteristic of this implementation, in contrast to some other notable operational models such as ones proposed in
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//! One characteristic of this implementation, in contrast to some other notable operational models such as ones proposed in
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//! Taming Release-Acquire Consistency by Ori Lahav et al. (https://plv.mpi-sws.org/sra/paper.pdf) or Promising Semantics noted above,
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//! Taming Release-Acquire Consistency by Ori Lahav et al. (<https://plv.mpi-sws.org/sra/paper.pdf>) or Promising Semantics noted above,
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//! is that this implementation does not require each thread to hold an isolated view of the entire memory. Here, store buffers are per-location
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//! is that this implementation does not require each thread to hold an isolated view of the entire memory. Here, store buffers are per-location
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//! and shared across all threads. This is more memory efficient but does require store elements (representing writes to a location) to record
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//! and shared across all threads. This is more memory efficient but does require store elements (representing writes to a location) to record
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//! information about reads, whereas in the other two models it is the other way round: reads points to the write it got its value from.
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//! information about reads, whereas in the other two models it is the other way round: reads points to the write it got its value from.
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@ -38,7 +38,7 @@
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//! on the next non-atomic or imperfectly overlapping atomic access to that region.
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//! on the next non-atomic or imperfectly overlapping atomic access to that region.
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//! These lazy (de)allocations happen in memory_accessed() on non-atomic accesses, and
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//! These lazy (de)allocations happen in memory_accessed() on non-atomic accesses, and
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//! get_or_create_store_buffer() on atomic accesses. This mostly works well, but it does
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//! get_or_create_store_buffer() on atomic accesses. This mostly works well, but it does
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//! lead to some issues (https://github.com/rust-lang/miri/issues/2164).
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//! lead to some issues (<https://github.com/rust-lang/miri/issues/2164>).
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//!
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//!
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//! One consequence of this difference is that safe/sound Rust allows for more operations on atomic locations
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//! One consequence of this difference is that safe/sound Rust allows for more operations on atomic locations
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//! than the C++20 atomic API was intended to allow, such as non-atomically accessing
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//! than the C++20 atomic API was intended to allow, such as non-atomically accessing
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@ -403,7 +403,7 @@ pub fn eval_entry<'tcx>(
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/// The string will be UTF-16 encoded and NUL terminated.
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/// The string will be UTF-16 encoded and NUL terminated.
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///
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///
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/// Panics if the zeroth argument contains the `"` character because doublequotes
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/// Panics if the zeroth argument contains the `"` character because doublequotes
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/// in argv[0] cannot be encoded using the standard command line parsing rules.
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/// in `argv[0]` cannot be encoded using the standard command line parsing rules.
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///
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///
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/// Further reading:
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/// Further reading:
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/// * [Parsing C++ command-line arguments](https://docs.microsoft.com/en-us/cpp/cpp/main-function-command-line-args?view=msvc-160#parsing-c-command-line-arguments)
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/// * [Parsing C++ command-line arguments](https://docs.microsoft.com/en-us/cpp/cpp/main-function-command-line-args?view=msvc-160#parsing-c-command-line-arguments)
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