From 7602a46bb9421afc4e158326f438b1853503b804 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Mon, 5 Aug 2019 16:28:27 +0200
Subject: [PATCH] Implement simd_extract

---
 example/std_example.rs |  7 +++++++
 src/intrinsics.rs      | 12 ++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/example/std_example.rs b/example/std_example.rs
index 63227acc4bd..1337c314766 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -72,6 +72,7 @@ unsafe fn test_simd() {
     test_mm_add_epi8();
     test_mm_add_pd();
     test_mm_cvtepi8_epi16();
+    test_mm_cvtsi128_si64();
 
     let mask1 = _mm_movemask_epi8(dbg!(_mm_setr_epi8(255u8 as i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)));
     assert_eq!(mask1, 1);
@@ -174,6 +175,12 @@ pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
     }
 }
 
+#[target_feature(enable = "sse2")]
+unsafe fn test_mm_cvtsi128_si64() {
+    let r = _mm_cvtsi128_si64(std::mem::transmute::<[i64; 2], _>([5, 0]));
+    assert_eq!(r, 5);
+}
+
 #[target_feature(enable = "sse4.1")]
 unsafe fn test_mm_cvtepi8_epi16() {
     let a = _mm_set1_epi8(10);
diff --git a/src/intrinsics.rs b/src/intrinsics.rs
index 8fee0fa457d..4f1cbbe0f10 100644
--- a/src/intrinsics.rs
+++ b/src/intrinsics.rs
@@ -953,6 +953,18 @@ fn swap(bcx: &mut FunctionBuilder, v: Value) -> Value {
             }
         };
 
+        simd_extract, (c v, o idx) {
+            let idx_const = crate::constant::mir_operand_get_const_val(fx, idx).expect("simd_extract* idx not const");
+            let idx = idx_const.val.try_to_bits(Size::from_bytes(4 /* u32*/)).expect(&format!("kind not scalar: {:?}", idx_const));
+            let (_lane_type, lane_count) = lane_type_and_count(fx, v.layout(), intrinsic);
+            if idx >= lane_count.into() {
+                fx.tcx.sess.span_fatal(fx.mir.span, &format!("[simd_extract] idx {} >= lane_count {}", idx, lane_count));
+            }
+
+            let ret_lane = v.value_field(fx, mir::Field::new(idx.try_into().unwrap()));
+            ret.write_cvalue(fx, ret_lane);
+        };
+
         simd_add, (c x, c y) {
             simd_int_flt_binop!(fx, intrinsic, iadd|fadd(x, y) -> ret);
         };