asm: Match clang behavior for inlateout fixed register operands
We have 2 options for representing LLVM constraints for `inlateout` operands on a fixed register (e.g. `r0`): `={r0},0` or `={r0},{r0}`. This PR changes the behavior to the latter, which matches the behavior of Clang since https://reviews.llvm.org/D87279.
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@ -130,7 +130,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
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op_idx.insert(idx, constraints.len());
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op_idx.insert(idx, constraints.len());
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constraints.push(reg_to_llvm(reg, Some(&value.layout)));
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constraints.push(reg_to_llvm(reg, Some(&value.layout)));
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}
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}
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InlineAsmOperandRef::InOut { reg, late: _, in_value, out_place: _ } => {
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InlineAsmOperandRef::InOut { reg, late, in_value, out_place: _ } => {
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let value = llvm_fixup_input(
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let value = llvm_fixup_input(
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self,
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self,
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in_value.immediate(),
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in_value.immediate(),
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@ -138,8 +138,17 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
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&in_value.layout,
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&in_value.layout,
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);
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);
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inputs.push(value);
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inputs.push(value);
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// In the case of fixed registers, we have the choice of
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// either using a tied operand or duplicating the constraint.
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// We prefer the latter because it matches the behavior of
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// Clang.
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if late && matches!(reg, InlineAsmRegOrRegClass::Reg(_)) {
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constraints.push(format!("{}", reg_to_llvm(reg, Some(&in_value.layout))));
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} else {
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constraints.push(format!("{}", op_idx[&idx]));
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constraints.push(format!("{}", op_idx[&idx]));
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}
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}
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}
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InlineAsmOperandRef::SymFn { instance } => {
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InlineAsmOperandRef::SymFn { instance } => {
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inputs.push(self.cx.get_fn(instance));
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inputs.push(self.cx.get_fn(instance));
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op_idx.insert(idx, constraints.len());
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op_idx.insert(idx, constraints.len());
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