Support more SIMD intrinsics
This commit is contained in:
Antoni Boucher
parent
ace3250da8
commit
6bfe2b0b05
104
src/builder.rs
104
src/builder.rs
@ -217,11 +217,27 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
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return Cow::Borrowed(args);
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}
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let func_name = format!("{:?}", func_ptr);
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let casted_args: Vec<_> = param_types
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.into_iter()
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.zip(args.iter())
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.enumerate()
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.map(|(index, (expected_ty, &actual_val))| {
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// NOTE: these intrinsics have missing parameters before the last one, so ignore the
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// last argument type check.
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// FIXME(antoyo): find a way to refactor in order to avoid this hack.
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match &*func_name {
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"__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
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| "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
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| "__builtin_ia32_sqrtpd512_mask" => {
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if index == args.len() - 1 {
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return actual_val;
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}
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},
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_ => (),
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}
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let actual_ty = actual_val.get_type();
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if expected_ty != actual_ty {
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if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() && actual_ty.get_size() != expected_ty.get_size() {
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@ -286,7 +302,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
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}
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fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
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let args = self.check_ptr_call("call", func_ptr, args);
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let mut args = self.check_ptr_call("call", func_ptr, args);
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// gccjit requires to use the result of functions, even when it's not used.
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// That's why we assign the result to a local or call add_eval().
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@ -298,6 +314,92 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
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if return_type != void_type {
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unsafe { RETURN_VALUE_COUNT += 1 };
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let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
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// Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
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// arguments here.
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if gcc_func.get_param_count() != args.len() {
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let func_name = format!("{:?}", func_ptr);
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match &*func_name {
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"__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
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// FIXME(antoyo): the following intrinsics has 4 (or 5) arguments according to the doc, but is defined with 2 (or 3) arguments in library/stdarch/crates/core_arch/src/x86/avx512f.rs.
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| "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
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| "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
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| "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask" | "__builtin_ia32_pmaxuq256_mask"
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| "__builtin_ia32_pmaxuq128_mask"
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| "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
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| "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
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| "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask" | "__builtin_ia32_pminuq256_mask"
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| "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask"
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=> {
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// TODO: refactor by separating those intrinsics outside of this branch.
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let add_before_last_arg =
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match &*func_name {
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"__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
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| "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
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| "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => true,
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_ => false,
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};
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let new_first_arg_is_zero =
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match &*func_name {
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"__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
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| "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask" => true,
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_ => false
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};
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let arg3_index =
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match &*func_name {
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"__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 1,
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_ => 2,
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};
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let mut new_args = args.to_vec();
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let arg3_type = gcc_func.get_param_type(arg3_index);
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let first_arg =
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if new_first_arg_is_zero {
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let vector_type = arg3_type.dyncast_vector().expect("vector type");
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let zero = self.context.new_rvalue_zero(vector_type.get_element_type());
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let num_units = vector_type.get_num_units();
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self.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units])
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}
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else {
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self.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue()
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};
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if add_before_last_arg {
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new_args.insert(new_args.len() - 1, first_arg);
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}
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else {
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new_args.push(first_arg);
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}
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let arg4_index =
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match &*func_name {
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"__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 2,
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_ => 3,
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};
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let arg4_type = gcc_func.get_param_type(arg4_index);
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let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
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if add_before_last_arg {
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new_args.insert(new_args.len() - 1, minus_one);
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}
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else {
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new_args.push(minus_one);
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}
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args = new_args.into();
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},
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"__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
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let mut new_args = args.to_vec();
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if args.len() == 3 {
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// Both llvm.fma.v16f32 and llvm.x86.avx512.vfmaddsub.ps.512 maps to
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// the same GCC intrinsic, but the former has 3 parameters and the
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// latter has 4 so it doesn't require this additional argument.
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let arg4_type = gcc_func.get_param_type(3);
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let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
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new_args.push(minus_one);
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}
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let arg5_type = gcc_func.get_param_type(4);
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new_args.push(self.context.new_rvalue_from_int(arg5_type, 4));
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args = new_args.into();
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},
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_ => (),
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}
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}
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self.block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
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result.to_rvalue()
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}
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@ -35,6 +35,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
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pub normal_function_addresses: RefCell<FxHashSet<RValue<'gcc>>>,
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pub functions: RefCell<FxHashMap<String, Function<'gcc>>>,
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pub intrinsics: RefCell<FxHashMap<String, Function<'gcc>>>,
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pub tls_model: gccjit::TlsModel,
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@ -184,6 +185,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
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current_func: RefCell::new(None),
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normal_function_addresses: Default::default(),
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functions: RefCell::new(functions),
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intrinsics: RefCell::new(FxHashMap::default()),
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tls_model,
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@ -315,8 +317,16 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
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}
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fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
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let func = get_fn(self, instance);
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let func = self.rvalue_as_function(func);
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let func_name = self.tcx.symbol_name(instance).name;
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let func =
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if self.intrinsics.borrow().contains_key(func_name) {
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self.intrinsics.borrow()[func_name].clone()
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}
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else {
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let func = get_fn(self, instance);
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self.rvalue_as_function(func)
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};
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let ptr = func.get_address(None);
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// TODO(antoyo): don't do this twice: i.e. in declare_fn and here.
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@ -11,6 +11,7 @@ use crate::intrinsic::llvm;
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impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
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pub fn get_or_insert_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
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if self.globals.borrow().contains_key(name) {
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// TODO: use [] instead of .get().expect()?
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let typ = self.globals.borrow().get(name).expect("global").get_type();
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let global = self.context.new_global(None, GlobalKind::Imported, typ, name);
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if is_tls {
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@ -103,7 +104,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
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/// update the declaration and return existing Value instead.
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fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
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if name.starts_with("llvm.") {
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return llvm::intrinsic(name, cx);
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let intrinsic = llvm::intrinsic(name, cx);
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cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
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return intrinsic;
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}
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let func =
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if cx.functions.borrow().contains_key(name) {
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@ -4275,5 +4275,8 @@ match name {
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"llvm.xcore.getid" => "__builtin_getid",
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"llvm.xcore.getps" => "__builtin_getps",
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"llvm.xcore.setps" => "__builtin_setps",
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_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
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_ => {
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println!("***** unsupported LLVM intrinsic {}", name);
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""
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},
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}
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@ -21,6 +21,24 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
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"llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
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// NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
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"llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
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"llvm.x86.avx512.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
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"llvm.x86.avx512.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
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"llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
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"llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
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"llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512_mask",
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"llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512_mask",
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"llvm.x86.avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
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"llvm.x86.avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
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"llvm.x86.avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
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"llvm.x86.avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
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"llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512_mask",
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"llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512_mask",
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"llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
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"llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
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"llvm.fma.v16f32" => "__builtin_ia32_vfmaddps512_mask",
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"llvm.fma.v8f64" => "__builtin_ia32_vfmaddpd512_mask",
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"llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddps512_mask",
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"llvm.x86.avx512.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
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// The above doc points to unknown builtins for the following, so override them:
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"llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
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