From 6afcb85219406bde837067a153cab813c64bab23 Mon Sep 17 00:00:00 2001 From: Mark Rousskov Date: Wed, 2 Nov 2022 08:01:43 -0400 Subject: [PATCH] Fix rustdoc lints --- crates/core_simd/src/intrinsics.rs | 2 +- crates/core_simd/src/ops.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/crates/core_simd/src/intrinsics.rs b/crates/core_simd/src/intrinsics.rs index 962c83a78cb..704e6ed0159 100644 --- a/crates/core_simd/src/intrinsics.rs +++ b/crates/core_simd/src/intrinsics.rs @@ -103,7 +103,7 @@ /// val: vector of values to select if a lane is masked /// ptr: vector of pointers to read from /// mask: a "wide" mask of integers, selects as if simd_select(mask, read(ptr), val) - /// note, the LLVM intrinsic accepts a mask vector of + /// note, the LLVM intrinsic accepts a mask vector of `` /// FIXME: review this if/when we fix up our mask story in general? pub(crate) fn simd_gather(val: T, ptr: U, mask: V) -> T; /// llvm.masked.scatter diff --git a/crates/core_simd/src/ops.rs b/crates/core_simd/src/ops.rs index 5a077a469d8..fc1e0bc426d 100644 --- a/crates/core_simd/src/ops.rs +++ b/crates/core_simd/src/ops.rs @@ -40,7 +40,7 @@ macro_rules! unsafe_base { /// SAFETY: This macro should not be used for anything except Shl or Shr, and passed the appropriate shift intrinsic. /// It handles performing a bitand in addition to calling the shift operator, so that the result -/// is well-defined: LLVM can return a poison value if you shl, lshr, or ashr if rhs >= ::BITS +/// is well-defined: LLVM can return a poison value if you shl, lshr, or ashr if `rhs >= ::BITS` /// At worst, this will maybe add another instruction and cycle, /// at best, it may open up more optimization opportunities, /// or simply be elided entirely, especially for SIMD ISAs which default to this.