diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index a571418c1f5..0aef77129d8 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -283,7 +283,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> { } InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {} InlineAsmArch::Nvptx64 => {} - InlineAsmArch::PowerPC => {} + InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {} InlineAsmArch::Hexagon => {} InlineAsmArch::Mips | InlineAsmArch::Mips64 => {} InlineAsmArch::SpirV => {} diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index f12debb5a34..c2f6bb76295 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -184,6 +184,7 @@ pub enum InlineAsmArch { Mips, Mips64, PowerPC, + PowerPC64, SpirV, Wasm32, } @@ -201,6 +202,7 @@ impl FromStr for InlineAsmArch { "riscv64" => Ok(Self::RiscV64), "nvptx64" => Ok(Self::Nvptx64), "powerpc" => Ok(Self::PowerPC), + "powerpc64" => Ok(Self::PowerPC64), "hexagon" => Ok(Self::Hexagon), "mips" => Ok(Self::Mips), "mips64" => Ok(Self::Mips64), @@ -290,7 +292,7 @@ impl InlineAsmReg { InlineAsmArch::Nvptx64 => { Self::Nvptx(NvptxInlineAsmReg::parse(arch, has_feature, target, &name)?) } - InlineAsmArch::PowerPC => { + InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { Self::PowerPC(PowerPCInlineAsmReg::parse(arch, has_feature, target, &name)?) } InlineAsmArch::Hexagon => { @@ -485,7 +487,9 @@ impl InlineAsmRegClass { Self::RiscV(RiscVInlineAsmRegClass::parse(arch, name)?) } InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmRegClass::parse(arch, name)?), - InlineAsmArch::PowerPC => Self::PowerPC(PowerPCInlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { + Self::PowerPC(PowerPCInlineAsmRegClass::parse(arch, name)?) + } InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmRegClass::parse(arch, name)?), InlineAsmArch::Mips | InlineAsmArch::Mips64 => { Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?) @@ -653,7 +657,7 @@ pub fn allocatable_registers( nvptx::fill_reg_map(arch, has_feature, target, &mut map); map } - InlineAsmArch::PowerPC => { + InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { let mut map = powerpc::regclass_map(); powerpc::fill_reg_map(arch, has_feature, target, &mut map); map diff --git a/compiler/rustc_target/src/asm/powerpc.rs b/compiler/rustc_target/src/asm/powerpc.rs index b254e5f3aaa..42fc25c4ff5 100644 --- a/compiler/rustc_target/src/asm/powerpc.rs +++ b/compiler/rustc_target/src/asm/powerpc.rs @@ -33,10 +33,16 @@ impl PowerPCInlineAsmRegClass { pub fn supported_types( self, - _arch: InlineAsmArch, + arch: InlineAsmArch, ) -> &'static [(InlineAsmType, Option<&'static str>)] { match self { - Self::reg | Self::reg_nonzero => types! { _: I8, I16, I32; }, + Self::reg | Self::reg_nonzero => { + if arch == InlineAsmArch::PowerPC { + types! { _: I8, I16, I32; } + } else { + types! { _: I8, I16, I32, I64; } + } + } Self::freg => types! { _: F32, F64; }, } } diff --git a/src/test/assembly/asm/powerpc-types.rs b/src/test/assembly/asm/powerpc-types.rs index 26c891392f2..742e4ddaed6 100644 --- a/src/test/assembly/asm/powerpc-types.rs +++ b/src/test/assembly/asm/powerpc-types.rs @@ -1,6 +1,8 @@ // min-llvm-version: 10.0.1 +// revisions: powerpc powerpc64 // assembly-output: emit-asm -// compile-flags: --target powerpc-unknown-linux-gnu +//[powerpc] compile-flags: --target powerpc-unknown-linux-gnu +//[powerpc64] compile-flags: --target powerpc64-unknown-linux-gnu // needs-llvm-components: powerpc #![feature(no_core, lang_items, rustc_attrs, repr_simd)] @@ -86,6 +88,13 @@ check!(reg_i16, i16, reg, "mr"); // CHECK: #NO_APP check!(reg_i32, i32, reg, "mr"); +// powerpc64-LABEL: reg_i64: +// powerpc64: #APP +// powerpc64: mr {{[0-9]+}}, {{[0-9]+}} +// powerpc64: #NO_APP +#[cfg(powerpc64)] +check!(reg_i64, i64, reg, "mr"); + // CHECK-LABEL: reg_i8_nz: // CHECK: #APP // CHECK: mr {{[0-9]+}}, {{[0-9]+}} @@ -104,6 +113,13 @@ check!(reg_i16_nz, i16, reg_nonzero, "mr"); // CHECK: #NO_APP check!(reg_i32_nz, i32, reg_nonzero, "mr"); +// powerpc64-LABEL: reg_i64_nz: +// powerpc64: #APP +// powerpc64: mr {{[0-9]+}}, {{[0-9]+}} +// powerpc64: #NO_APP +#[cfg(powerpc64)] +check!(reg_i64_nz, i64, reg_nonzero, "mr"); + // CHECK-LABEL: reg_f32: // CHECK: #APP // CHECK: fmr {{[0-9]+}}, {{[0-9]+}} @@ -134,6 +150,13 @@ check_reg!(reg_i16_r0, i16, "0", "0", "mr"); // CHECK: #NO_APP check_reg!(reg_i32_r0, i32, "0", "0", "mr"); +// powerpc64-LABEL: reg_i64_r0: +// powerpc64: #APP +// powerpc64: mr 0, 0 +// powerpc64: #NO_APP +#[cfg(powerpc64)] +check_reg!(reg_i64_r0, i64, "0", "0", "mr"); + // CHECK-LABEL: reg_i8_r18: // CHECK: #APP // CHECK: mr 18, 18 @@ -152,6 +175,13 @@ check_reg!(reg_i16_r18, i16, "18", "18", "mr"); // CHECK: #NO_APP check_reg!(reg_i32_r18, i32, "18", "18", "mr"); +// powerpc64-LABEL: reg_i64_r18: +// powerpc64: #APP +// powerpc64: mr 18, 18 +// powerpc64: #NO_APP +#[cfg(powerpc64)] +check_reg!(reg_i64_r18, i64, "18", "18", "mr"); + // CHECK-LABEL: reg_f32_f0: // CHECK: #APP // CHECK: fmr 0, 0