Fix simd_shuffle_generic intrinsic
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@ -148,7 +148,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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let total_len = lane_count * 2;
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let indexes =
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idx.iter().map(|idx| idx.unwrap_leaf().try_to_u16().unwrap()).collect::<Vec<u16>>();
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idx.iter().map(|idx| idx.unwrap_leaf().try_to_u32().unwrap()).collect::<Vec<u32>>();
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for &idx in &indexes {
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assert!(u64::from(idx) < total_len, "idx {} out of range 0..{}", idx, total_len);
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