Auto merge of #2004 - RalfJung:simd, r=RalfJung
implement more SIMD intrinsics Requires https://github.com/rust-lang/rust/pull/94681 With this, the cast, i32_ops, and f32_ops test suites of portable-simd pass. :) Cc https://github.com/rust-lang/miri/issues/1912
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commit
64b086a8e2
@ -1 +1 @@
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8876ca3dd46b99fe7e6ad937f11493d37996231e
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297273c45b205820a4c055082c71677197a40b55
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@ -345,7 +345,6 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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bug!("simd_fabs operand is not a float")
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};
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let op = op.to_scalar()?;
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// FIXME: Using host floats.
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match float_ty {
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FloatTy::F32 => Scalar::from_f32(op.to_f32()?.abs()),
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FloatTy::F64 => Scalar::from_f64(op.to_f64()?.abs()),
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@ -371,7 +370,9 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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| "simd_lt"
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| "simd_le"
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| "simd_gt"
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| "simd_ge" => {
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| "simd_ge"
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| "simd_fmax"
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| "simd_fmin" => {
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use mir::BinOp;
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let &[ref left, ref right] = check_arg_count(args)?;
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@ -382,23 +383,30 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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assert_eq!(dest_len, left_len);
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assert_eq!(dest_len, right_len);
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let mir_op = match intrinsic_name {
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"simd_add" => BinOp::Add,
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"simd_sub" => BinOp::Sub,
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"simd_mul" => BinOp::Mul,
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"simd_div" => BinOp::Div,
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"simd_rem" => BinOp::Rem,
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"simd_shl" => BinOp::Shl,
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"simd_shr" => BinOp::Shr,
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"simd_and" => BinOp::BitAnd,
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"simd_or" => BinOp::BitOr,
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"simd_xor" => BinOp::BitXor,
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"simd_eq" => BinOp::Eq,
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"simd_ne" => BinOp::Ne,
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"simd_lt" => BinOp::Lt,
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"simd_le" => BinOp::Le,
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"simd_gt" => BinOp::Gt,
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"simd_ge" => BinOp::Ge,
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enum Op {
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MirOp(BinOp),
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FMax,
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FMin,
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}
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let which = match intrinsic_name {
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"simd_add" => Op::MirOp(BinOp::Add),
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"simd_sub" => Op::MirOp(BinOp::Sub),
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"simd_mul" => Op::MirOp(BinOp::Mul),
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"simd_div" => Op::MirOp(BinOp::Div),
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"simd_rem" => Op::MirOp(BinOp::Rem),
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"simd_shl" => Op::MirOp(BinOp::Shl),
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"simd_shr" => Op::MirOp(BinOp::Shr),
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"simd_and" => Op::MirOp(BinOp::BitAnd),
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"simd_or" => Op::MirOp(BinOp::BitOr),
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"simd_xor" => Op::MirOp(BinOp::BitXor),
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"simd_eq" => Op::MirOp(BinOp::Eq),
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"simd_ne" => Op::MirOp(BinOp::Ne),
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"simd_lt" => Op::MirOp(BinOp::Lt),
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"simd_le" => Op::MirOp(BinOp::Le),
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"simd_gt" => Op::MirOp(BinOp::Gt),
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"simd_ge" => Op::MirOp(BinOp::Ge),
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"simd_fmax" => Op::FMax,
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"simd_fmin" => Op::FMin,
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_ => unreachable!(),
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};
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@ -406,26 +414,36 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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let left = this.read_immediate(&this.mplace_index(&left, i)?.into())?;
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let right = this.read_immediate(&this.mplace_index(&right, i)?.into())?;
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let dest = this.mplace_index(&dest, i)?;
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let (val, overflowed, ty) = this.overflowing_binary_op(mir_op, &left, &right)?;
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if matches!(mir_op, BinOp::Shl | BinOp::Shr) {
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// Shifts have extra UB as SIMD operations that the MIR binop does not have.
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// See <https://github.com/rust-lang/rust/issues/91237>.
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if overflowed {
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let r_val = right.to_scalar()?.to_bits(right.layout.size)?;
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throw_ub_format!("overflowing shift by {} in `{}` in SIMD lane {}", r_val, intrinsic_name, i);
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let val = match which {
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Op::MirOp(mir_op) => {
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let (val, overflowed, ty) = this.overflowing_binary_op(mir_op, &left, &right)?;
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if matches!(mir_op, BinOp::Shl | BinOp::Shr) {
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// Shifts have extra UB as SIMD operations that the MIR binop does not have.
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// See <https://github.com/rust-lang/rust/issues/91237>.
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if overflowed {
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let r_val = right.to_scalar()?.to_bits(right.layout.size)?;
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throw_ub_format!("overflowing shift by {} in `{}` in SIMD lane {}", r_val, intrinsic_name, i);
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}
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}
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if matches!(mir_op, BinOp::Eq | BinOp::Ne | BinOp::Lt | BinOp::Le | BinOp::Gt | BinOp::Ge) {
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// Special handling for boolean-returning operations
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assert_eq!(ty, this.tcx.types.bool);
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let val = val.to_bool().unwrap();
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bool_to_simd_element(val, dest.layout.size)
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} else {
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assert_ne!(ty, this.tcx.types.bool);
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assert_eq!(ty, dest.layout.ty);
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val
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}
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}
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}
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if matches!(mir_op, BinOp::Eq | BinOp::Ne | BinOp::Lt | BinOp::Le | BinOp::Gt | BinOp::Ge) {
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// Special handling for boolean-returning operations
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assert_eq!(ty, this.tcx.types.bool);
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let val = val.to_bool().unwrap();
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let val = bool_to_simd_element(val, dest.layout.size);
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this.write_scalar(val, &dest.into())?;
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} else {
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assert_ne!(ty, this.tcx.types.bool);
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assert_eq!(ty, dest.layout.ty);
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this.write_scalar(val, &dest.into())?;
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}
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Op::FMax => {
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fmax_op(&left, &right)?
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}
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Op::FMin => {
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fmin_op(&left, &right)?
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}
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};
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this.write_scalar(val, &dest.into())?;
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}
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}
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#[rustfmt::skip]
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@ -433,7 +451,9 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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| "simd_reduce_or"
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| "simd_reduce_xor"
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| "simd_reduce_any"
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| "simd_reduce_all" => {
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| "simd_reduce_all"
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| "simd_reduce_max"
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| "simd_reduce_min" => {
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use mir::BinOp;
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let &[ref op] = check_arg_count(args)?;
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@ -445,19 +465,27 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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enum Op {
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MirOp(BinOp),
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MirOpBool(BinOp),
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Max,
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Min,
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}
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// The initial value is the neutral element.
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let (which, init) = match intrinsic_name {
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"simd_reduce_and" => (Op::MirOp(BinOp::BitAnd), ImmTy::from_int(-1, dest.layout)),
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"simd_reduce_or" => (Op::MirOp(BinOp::BitOr), ImmTy::from_int(0, dest.layout)),
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"simd_reduce_xor" => (Op::MirOp(BinOp::BitXor), ImmTy::from_int(0, dest.layout)),
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"simd_reduce_any" => (Op::MirOpBool(BinOp::BitOr), imm_from_bool(false)),
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"simd_reduce_all" => (Op::MirOpBool(BinOp::BitAnd), imm_from_bool(true)),
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let which = match intrinsic_name {
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"simd_reduce_and" => Op::MirOp(BinOp::BitAnd),
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"simd_reduce_or" => Op::MirOp(BinOp::BitOr),
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"simd_reduce_xor" => Op::MirOp(BinOp::BitXor),
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"simd_reduce_any" => Op::MirOpBool(BinOp::BitOr),
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"simd_reduce_all" => Op::MirOpBool(BinOp::BitAnd),
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"simd_reduce_max" => Op::Max,
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"simd_reduce_min" => Op::Min,
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_ => unreachable!(),
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};
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let mut res = init;
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for i in 0..op_len {
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// Initialize with first lane, then proceed with the rest.
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let mut res = this.read_immediate(&this.mplace_index(&op, 0)?.into())?;
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if matches!(which, Op::MirOpBool(_)) {
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// Convert to `bool` scalar.
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res = imm_from_bool(simd_element_to_bool(res)?);
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}
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for i in 1..op_len {
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let op = this.read_immediate(&this.mplace_index(&op, i)?.into())?;
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res = match which {
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Op::MirOp(mir_op) => {
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@ -467,6 +495,30 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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let op = imm_from_bool(simd_element_to_bool(op)?);
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this.binary_op(mir_op, &res, &op)?
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}
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Op::Max => {
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if matches!(res.layout.ty.kind(), ty::Float(_)) {
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ImmTy::from_scalar(fmax_op(&res, &op)?, res.layout)
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} else {
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// Just boring integers, so NaNs to worry about
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if this.binary_op(BinOp::Ge, &res, &op)?.to_scalar()?.to_bool()? {
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res
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} else {
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op
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}
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}
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}
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Op::Min => {
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if matches!(res.layout.ty.kind(), ty::Float(_)) {
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ImmTy::from_scalar(fmin_op(&res, &op)?, res.layout)
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} else {
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// Just boring integers, so NaNs to worry about
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if this.binary_op(BinOp::Le, &res, &op)?.to_scalar()?.to_bool()? {
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res
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} else {
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op
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}
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}
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}
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};
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}
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this.write_immediate(*res, dest)?;
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@ -515,6 +567,45 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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this.write_immediate(*val, &dest.into())?;
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}
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}
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#[rustfmt::skip]
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"simd_cast" | "simd_as" => {
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let &[ref op] = check_arg_count(args)?;
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let (op, op_len) = this.operand_to_simd(op)?;
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let (dest, dest_len) = this.place_to_simd(dest)?;
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assert_eq!(dest_len, op_len);
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let safe_cast = intrinsic_name == "simd_as";
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for i in 0..dest_len {
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let op = this.read_immediate(&this.mplace_index(&op, i)?.into())?;
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let dest = this.mplace_index(&dest, i)?;
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let val = match (op.layout.ty.kind(), dest.layout.ty.kind()) {
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// Int-to-(int|float): always safe
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(ty::Int(_) | ty::Uint(_), ty::Int(_) | ty::Uint(_) | ty::Float(_)) =>
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this.misc_cast(&op, dest.layout.ty)?,
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// Float-to-float: always safe
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(ty::Float(_), ty::Float(_)) =>
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this.misc_cast(&op, dest.layout.ty)?,
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// Float-to-int in safe mode
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(ty::Float(_), ty::Int(_) | ty::Uint(_)) if safe_cast =>
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this.misc_cast(&op, dest.layout.ty)?,
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// Float-to-int in unchecked mode
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(ty::Float(FloatTy::F32), ty::Int(_) | ty::Uint(_)) if !safe_cast =>
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this.float_to_int_unchecked(op.to_scalar()?.to_f32()?, dest.layout.ty)?.into(),
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(ty::Float(FloatTy::F64), ty::Int(_) | ty::Uint(_)) if !safe_cast =>
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this.float_to_int_unchecked(op.to_scalar()?.to_f64()?, dest.layout.ty)?.into(),
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_ =>
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throw_unsup_format!(
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"Unsupported SIMD cast from element type {} to {}",
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op.layout.ty,
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dest.layout.ty
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),
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};
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this.write_immediate(val, &dest.into())?;
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}
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}
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// Atomic operations
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"atomic_load" => this.atomic_load(args, dest, AtomicReadOp::SeqCst)?,
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@ -1003,3 +1094,35 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
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})
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}
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}
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fn fmax_op<'tcx>(
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left: &ImmTy<'tcx, Tag>,
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right: &ImmTy<'tcx, Tag>,
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) -> InterpResult<'tcx, Scalar<Tag>> {
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assert_eq!(left.layout.ty, right.layout.ty);
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let ty::Float(float_ty) = left.layout.ty.kind() else {
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bug!("fmax operand is not a float")
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};
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let left = left.to_scalar()?;
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let right = right.to_scalar()?;
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Ok(match float_ty {
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FloatTy::F32 => Scalar::from_f32(left.to_f32()?.max(right.to_f32()?)),
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FloatTy::F64 => Scalar::from_f64(left.to_f64()?.max(right.to_f64()?)),
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})
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}
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fn fmin_op<'tcx>(
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left: &ImmTy<'tcx, Tag>,
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right: &ImmTy<'tcx, Tag>,
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) -> InterpResult<'tcx, Scalar<Tag>> {
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assert_eq!(left.layout.ty, right.layout.ty);
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let ty::Float(float_ty) = left.layout.ty.kind() else {
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bug!("fmin operand is not a float")
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};
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let left = left.to_scalar()?;
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let right = right.to_scalar()?;
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Ok(match float_ty {
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FloatTy::F32 => Scalar::from_f32(left.to_f32()?.min(right.to_f32()?)),
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FloatTy::F64 => Scalar::from_f64(left.to_f64()?.min(right.to_f64()?)),
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})
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}
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7
tests/compile-fail/intrinsics/simd-float-to-int.rs
Normal file
7
tests/compile-fail/intrinsics/simd-float-to-int.rs
Normal file
@ -0,0 +1,7 @@
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// error-pattern: cannot be represented in target type `i32`
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#![feature(portable_simd)]
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use std::simd::*;
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fn main() { unsafe {
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let _x : i32x2 = f32x2::from_array([f32::MAX, f32::MIN]).to_int_unchecked();
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} }
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@ -12,19 +12,37 @@ fn simd_ops_f32() {
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assert_eq!(a / f32x4::splat(2.0), f32x4::splat(5.0));
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assert_eq!(a % b, f32x4::from_array([0.0, 0.0, 1.0, 2.0]));
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assert_eq!(b.abs(), f32x4::from_array([1.0, 2.0, 3.0, 4.0]));
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assert_eq!(a.max(b * f32x4::splat(4.0)), f32x4::from_array([10.0, 10.0, 12.0, 10.0]));
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assert_eq!(a.min(b * f32x4::splat(4.0)), f32x4::from_array([4.0, 8.0, 10.0, -16.0]));
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// FIXME use Mask::from_array once simd_cast is implemented.
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assert_eq!(a.lanes_eq(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([0, -1, 0, 0])));
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assert_eq!(a.lanes_ne(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([-1, 0, -1, -1])));
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assert_eq!(a.lanes_le(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([0, -1, -1, 0])));
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assert_eq!(a.lanes_lt(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([0, 0, -1, 0])));
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assert_eq!(a.lanes_ge(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([-1, -1, 0, -1])));
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assert_eq!(a.lanes_gt(f32x4::splat(5.0)*b), Mask::from_int(i32x4::from_array([-1, 0, 0, -1])));
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assert_eq!(a.lanes_eq(f32x4::splat(5.0) * b), Mask::from_array([false, true, false, false]));
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assert_eq!(a.lanes_ne(f32x4::splat(5.0) * b), Mask::from_array([true, false, true, true]));
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assert_eq!(a.lanes_le(f32x4::splat(5.0) * b), Mask::from_array([false, true, true, false]));
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assert_eq!(a.lanes_lt(f32x4::splat(5.0) * b), Mask::from_array([false, false, true, false]));
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assert_eq!(a.lanes_ge(f32x4::splat(5.0) * b), Mask::from_array([true, true, false, true]));
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assert_eq!(a.lanes_gt(f32x4::splat(5.0) * b), Mask::from_array([true, false, false, true]));
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assert_eq!(a.horizontal_sum(), 40.0);
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assert_eq!(b.horizontal_sum(), 2.0);
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assert_eq!(a.horizontal_product(), 100.0*100.0);
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assert_eq!(a.horizontal_product(), 100.0 * 100.0);
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assert_eq!(b.horizontal_product(), -24.0);
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assert_eq!(a.horizontal_max(), 10.0);
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assert_eq!(b.horizontal_max(), 3.0);
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assert_eq!(a.horizontal_min(), 10.0);
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assert_eq!(b.horizontal_min(), -4.0);
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assert_eq!(
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f32x2::from_array([0.0, f32::NAN]).max(f32x2::from_array([f32::NAN, 0.0])),
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f32x2::from_array([0.0, 0.0])
|
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);
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assert_eq!(f32x2::from_array([0.0, f32::NAN]).horizontal_max(), 0.0);
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assert_eq!(f32x2::from_array([f32::NAN, 0.0]).horizontal_max(), 0.0);
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assert_eq!(
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f32x2::from_array([0.0, f32::NAN]).min(f32x2::from_array([f32::NAN, 0.0])),
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f32x2::from_array([0.0, 0.0])
|
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);
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assert_eq!(f32x2::from_array([0.0, f32::NAN]).horizontal_min(), 0.0);
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assert_eq!(f32x2::from_array([f32::NAN, 0.0]).horizontal_min(), 0.0);
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}
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fn simd_ops_f64() {
|
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@ -38,19 +56,37 @@ fn simd_ops_f64() {
|
||||
assert_eq!(a / f64x4::splat(2.0), f64x4::splat(5.0));
|
||||
assert_eq!(a % b, f64x4::from_array([0.0, 0.0, 1.0, 2.0]));
|
||||
assert_eq!(b.abs(), f64x4::from_array([1.0, 2.0, 3.0, 4.0]));
|
||||
assert_eq!(a.max(b * f64x4::splat(4.0)), f64x4::from_array([10.0, 10.0, 12.0, 10.0]));
|
||||
assert_eq!(a.min(b * f64x4::splat(4.0)), f64x4::from_array([4.0, 8.0, 10.0, -16.0]));
|
||||
|
||||
// FIXME use Mask::from_array once simd_cast is implemented.
|
||||
assert_eq!(a.lanes_eq(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([0, -1, 0, 0])));
|
||||
assert_eq!(a.lanes_ne(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([-1, 0, -1, -1])));
|
||||
assert_eq!(a.lanes_le(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([0, -1, -1, 0])));
|
||||
assert_eq!(a.lanes_lt(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([0, 0, -1, 0])));
|
||||
assert_eq!(a.lanes_ge(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([-1, -1, 0, -1])));
|
||||
assert_eq!(a.lanes_gt(f64x4::splat(5.0)*b), Mask::from_int(i64x4::from_array([-1, 0, 0, -1])));
|
||||
assert_eq!(a.lanes_eq(f64x4::splat(5.0) * b), Mask::from_array([false, true, false, false]));
|
||||
assert_eq!(a.lanes_ne(f64x4::splat(5.0) * b), Mask::from_array([true, false, true, true]));
|
||||
assert_eq!(a.lanes_le(f64x4::splat(5.0) * b), Mask::from_array([false, true, true, false]));
|
||||
assert_eq!(a.lanes_lt(f64x4::splat(5.0) * b), Mask::from_array([false, false, true, false]));
|
||||
assert_eq!(a.lanes_ge(f64x4::splat(5.0) * b), Mask::from_array([true, true, false, true]));
|
||||
assert_eq!(a.lanes_gt(f64x4::splat(5.0) * b), Mask::from_array([true, false, false, true]));
|
||||
|
||||
assert_eq!(a.horizontal_sum(), 40.0);
|
||||
assert_eq!(b.horizontal_sum(), 2.0);
|
||||
assert_eq!(a.horizontal_product(), 100.0*100.0);
|
||||
assert_eq!(a.horizontal_product(), 100.0 * 100.0);
|
||||
assert_eq!(b.horizontal_product(), -24.0);
|
||||
assert_eq!(a.horizontal_max(), 10.0);
|
||||
assert_eq!(b.horizontal_max(), 3.0);
|
||||
assert_eq!(a.horizontal_min(), 10.0);
|
||||
assert_eq!(b.horizontal_min(), -4.0);
|
||||
|
||||
assert_eq!(
|
||||
f64x2::from_array([0.0, f64::NAN]).max(f64x2::from_array([f64::NAN, 0.0])),
|
||||
f64x2::from_array([0.0, 0.0])
|
||||
);
|
||||
assert_eq!(f64x2::from_array([0.0, f64::NAN]).horizontal_max(), 0.0);
|
||||
assert_eq!(f64x2::from_array([f64::NAN, 0.0]).horizontal_max(), 0.0);
|
||||
assert_eq!(
|
||||
f64x2::from_array([0.0, f64::NAN]).min(f64x2::from_array([f64::NAN, 0.0])),
|
||||
f64x2::from_array([0.0, 0.0])
|
||||
);
|
||||
assert_eq!(f64x2::from_array([0.0, f64::NAN]).horizontal_min(), 0.0);
|
||||
assert_eq!(f64x2::from_array([f64::NAN, 0.0]).horizontal_min(), 0.0);
|
||||
}
|
||||
|
||||
fn simd_ops_i32() {
|
||||
@ -65,19 +101,33 @@ fn simd_ops_i32() {
|
||||
assert_eq!(i32x2::splat(i32::MIN) / i32x2::splat(-1), i32x2::splat(i32::MIN));
|
||||
assert_eq!(a % b, i32x4::from_array([0, 0, 1, 2]));
|
||||
assert_eq!(i32x2::splat(i32::MIN) % i32x2::splat(-1), i32x2::splat(0));
|
||||
assert_eq!(b.abs(), i32x4::from_array([1, 2, 3, 4]));
|
||||
// FIXME not a per-lane method (https://github.com/rust-lang/rust/issues/94682)
|
||||
// assert_eq!(a.max(b * i32x4::splat(4)), i32x4::from_array([10, 10, 12, 10]));
|
||||
// assert_eq!(a.min(b * i32x4::splat(4)), i32x4::from_array([4, 8, 10, -16]));
|
||||
|
||||
assert_eq!(!b, i32x4::from_array([!1, !2, !3, !-4]));
|
||||
assert_eq!(b << i32x4::splat(2), i32x4::from_array([4, 8, 12, -16]));
|
||||
assert_eq!(b >> i32x4::splat(1), i32x4::from_array([0, 1, 1, -2]));
|
||||
assert_eq!(b & i32x4::splat(2), i32x4::from_array([0, 2, 2, 0]));
|
||||
assert_eq!(b | i32x4::splat(2), i32x4::from_array([3, 2, 3, -2]));
|
||||
assert_eq!(b ^ i32x4::splat(2), i32x4::from_array([3, 0, 1, -2]));
|
||||
|
||||
// FIXME use Mask::from_array once simd_cast is implemented.
|
||||
assert_eq!(a.lanes_eq(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([0, -1, 0, 0])));
|
||||
assert_eq!(a.lanes_ne(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([-1, 0, -1, -1])));
|
||||
assert_eq!(a.lanes_le(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([0, -1, -1, 0])));
|
||||
assert_eq!(a.lanes_lt(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([0, 0, -1, 0])));
|
||||
assert_eq!(a.lanes_ge(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([-1, -1, 0, -1])));
|
||||
assert_eq!(a.lanes_gt(i32x4::splat(5)*b), Mask::from_int(i32x4::from_array([-1, 0, 0, -1])));
|
||||
assert_eq!(a.lanes_eq(i32x4::splat(5) * b), Mask::from_array([false, true, false, false]));
|
||||
assert_eq!(a.lanes_ne(i32x4::splat(5) * b), Mask::from_array([true, false, true, true]));
|
||||
assert_eq!(a.lanes_le(i32x4::splat(5) * b), Mask::from_array([false, true, true, false]));
|
||||
assert_eq!(a.lanes_lt(i32x4::splat(5) * b), Mask::from_array([false, false, true, false]));
|
||||
assert_eq!(a.lanes_ge(i32x4::splat(5) * b), Mask::from_array([true, true, false, true]));
|
||||
assert_eq!(a.lanes_gt(i32x4::splat(5) * b), Mask::from_array([true, false, false, true]));
|
||||
|
||||
assert_eq!(a.horizontal_sum(), 40);
|
||||
assert_eq!(b.horizontal_sum(), 2);
|
||||
assert_eq!(a.horizontal_product(), 100 * 100);
|
||||
assert_eq!(b.horizontal_product(), -24);
|
||||
assert_eq!(a.horizontal_max(), 10);
|
||||
assert_eq!(b.horizontal_max(), 3);
|
||||
assert_eq!(a.horizontal_min(), 10);
|
||||
assert_eq!(b.horizontal_min(), -4);
|
||||
|
||||
assert_eq!(a.horizontal_and(), 10);
|
||||
assert_eq!(b.horizontal_and(), 0);
|
||||
@ -85,10 +135,90 @@ fn simd_ops_i32() {
|
||||
assert_eq!(b.horizontal_or(), -1);
|
||||
assert_eq!(a.horizontal_xor(), 0);
|
||||
assert_eq!(b.horizontal_xor(), -4);
|
||||
assert_eq!(a.horizontal_sum(), 40);
|
||||
assert_eq!(b.horizontal_sum(), 2);
|
||||
assert_eq!(a.horizontal_product(), 100*100);
|
||||
assert_eq!(b.horizontal_product(), -24);
|
||||
}
|
||||
|
||||
fn simd_mask() {
|
||||
let intmask = Mask::from_int(i32x4::from_array([0, -1, 0, 0]));
|
||||
assert_eq!(intmask, Mask::from_array([false, true, false, false]));
|
||||
assert_eq!(intmask.to_array(), [false, true, false, false]);
|
||||
}
|
||||
|
||||
fn simd_cast() {
|
||||
// between integer types
|
||||
assert_eq!(i32x4::from_array([1, 2, 3, -4]), i16x4::from_array([1, 2, 3, -4]).cast());
|
||||
assert_eq!(i16x4::from_array([1, 2, 3, -4]), i32x4::from_array([1, 2, 3, -4]).cast());
|
||||
assert_eq!(i32x4::from_array([1, -1, 3, 4]), u64x4::from_array([1, u64::MAX, 3, 4]).cast());
|
||||
|
||||
// float -> int
|
||||
assert_eq!(
|
||||
i8x4::from_array([127, -128, 127, -128]),
|
||||
f32x4::from_array([127.99, -128.99, 999.0, -999.0]).cast()
|
||||
);
|
||||
assert_eq!(
|
||||
i32x4::from_array([0, 1, -1, 2147483520]),
|
||||
f32x4::from_array([
|
||||
-0.0,
|
||||
/*0x1.19999ap+0*/ f32::from_bits(0x3f8ccccd),
|
||||
/*-0x1.19999ap+0*/ f32::from_bits(0xbf8ccccd),
|
||||
2147483520.0
|
||||
])
|
||||
.cast()
|
||||
);
|
||||
assert_eq!(
|
||||
i32x8::from_array([i32::MAX, i32::MIN, i32::MAX, i32::MIN, i32::MAX, i32::MIN, 0, 0]),
|
||||
f32x8::from_array([
|
||||
2147483648.0f32,
|
||||
-2147483904.0f32,
|
||||
f32::MAX,
|
||||
f32::MIN,
|
||||
f32::INFINITY,
|
||||
f32::NEG_INFINITY,
|
||||
f32::NAN,
|
||||
-f32::NAN,
|
||||
])
|
||||
.cast()
|
||||
);
|
||||
|
||||
// int -> float
|
||||
assert_eq!(
|
||||
f32x4::from_array([
|
||||
-2147483648.0,
|
||||
/*0x1.26580cp+30*/ f32::from_bits(0x4e932c06),
|
||||
16777220.0,
|
||||
-16777220.0,
|
||||
]),
|
||||
i32x4::from_array([-2147483647i32, 1234567890i32, 16777219i32, -16777219i32]).cast()
|
||||
);
|
||||
|
||||
// float -> float
|
||||
assert_eq!(
|
||||
f32x4::from_array([f32::INFINITY, f32::INFINITY, f32::NEG_INFINITY, f32::NEG_INFINITY]),
|
||||
f64x4::from_array([f64::MAX, f64::INFINITY, f64::MIN, f64::NEG_INFINITY]).cast()
|
||||
);
|
||||
|
||||
// unchecked casts
|
||||
unsafe {
|
||||
assert_eq!(
|
||||
i32x4::from_array([0, 1, -1, 2147483520]),
|
||||
f32x4::from_array([
|
||||
-0.0,
|
||||
/*0x1.19999ap+0*/ f32::from_bits(0x3f8ccccd),
|
||||
/*-0x1.19999ap+0*/ f32::from_bits(0xbf8ccccd),
|
||||
2147483520.0
|
||||
])
|
||||
.to_int_unchecked()
|
||||
);
|
||||
assert_eq!(
|
||||
u64x4::from_array([0, 10000000000000000, u64::MAX - 2047, 9223372036854775808]),
|
||||
f64x4::from_array([
|
||||
-0.99999999999,
|
||||
1e16,
|
||||
(u64::MAX - 1024) as f64,
|
||||
9223372036854775808.0
|
||||
])
|
||||
.to_int_unchecked()
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
fn simd_intrinsics() {
|
||||
@ -112,14 +242,22 @@ fn simd_intrinsics() {
|
||||
assert!(simd_reduce_all(i32x4::splat(-1)));
|
||||
assert!(!simd_reduce_all(i32x2::from_array([0, -1])));
|
||||
|
||||
assert_eq!(simd_select(i8x4::from_array([0, -1, -1, 0]), a, b), i32x4::from_array([1, 10, 10, 4]));
|
||||
assert_eq!(simd_select(i8x4::from_array([0, -1, -1, 0]), b, a), i32x4::from_array([10, 2, 10, 10]));
|
||||
assert_eq!(
|
||||
simd_select(i8x4::from_array([0, -1, -1, 0]), a, b),
|
||||
i32x4::from_array([1, 10, 10, 4])
|
||||
);
|
||||
assert_eq!(
|
||||
simd_select(i8x4::from_array([0, -1, -1, 0]), b, a),
|
||||
i32x4::from_array([10, 2, 10, 10])
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
fn main() {
|
||||
simd_mask();
|
||||
simd_ops_f32();
|
||||
simd_ops_f64();
|
||||
simd_ops_i32();
|
||||
simd_cast();
|
||||
simd_intrinsics();
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user