parent
521db88cd9
commit
60b7c2aaef
@ -479,10 +479,13 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
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_ => unreachable!(),
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}
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} else {
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// We use i32 as the type for discarded outputs
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's'
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// We use i64x2 as the type for discarded outputs
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'q'
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};
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format!("{{{}{}}}", class, idx)
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} else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) {
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// LLVM doesn't recognize x30
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"lr".to_string()
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} else {
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format!("{{{}}}", reg.name())
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}
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