Accept [u8; N] bitmasks in simd_select_bitmask
Fixes rust-lang/rustc_codegen_cranelift#1446
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@ -133,8 +133,8 @@ pub(crate) static REGEX: CargoProject = CargoProject::new(®EX_REPO.source_dir
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pub(crate) static PORTABLE_SIMD_REPO: GitRepo = GitRepo::github(
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"rust-lang",
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"portable-simd",
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"4825b2a64d765317066948867e8714674419359b",
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"9e67d07c00f5fb0b",
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"97007cc2e70df8c97326ce896a79e2f0ce4dd98b",
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"e54a16035cedf205",
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"portable-simd",
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);
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@ -1,22 +0,0 @@
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From a101a43b795431ce617e7782afb451f4853afc00 Mon Sep 17 00:00:00 2001
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From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
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Date: Thu, 7 Dec 2023 14:51:35 +0000
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Subject: [PATCH] Enable the exposed_provenance feature
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---
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crates/core_simd/tests/pointers.rs | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/crates/core_simd/tests/pointers.rs b/crates/core_simd/tests/pointers.rs
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index 0ae8f83..06620d6 100644
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--- a/crates/core_simd/tests/pointers.rs
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+++ b/crates/core_simd/tests/pointers.rs
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@@ -1,4 +1,4 @@
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-#![feature(portable_simd, strict_provenance)]
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+#![feature(exposed_provenance, portable_simd, strict_provenance)]
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use core_simd::simd::{Simd, SimdConstPtr, SimdMutPtr};
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--
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2.34.1
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@ -822,7 +822,35 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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let (lane_count, lane_ty) = a.layout().ty.simd_size_and_type(fx.tcx);
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let lane_layout = fx.layout_of(lane_ty);
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let m = m.load_scalar(fx);
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let expected_int_bits = lane_count.max(8);
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let expected_bytes = expected_int_bits / 8 + ((expected_int_bits % 8 > 0) as u64);
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let m = match m.layout().ty.kind() {
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ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => m.load_scalar(fx),
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ty::Array(elem, len)
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if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
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&& len.try_eval_target_usize(fx.tcx, ty::ParamEnv::reveal_all())
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== Some(expected_bytes) =>
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{
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m.force_stack(fx).0.load(
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fx,
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Type::int(expected_int_bits as u16).unwrap(),
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MemFlags::trusted(),
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)
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}
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_ => {
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fx.tcx.dcx().span_fatal(
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span,
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format!(
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"invalid monomorphization of `simd_select_bitmask` intrinsic: \
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cannot accept `{}` as mask, expected `u{}` or `[u8; {}]`",
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ret.layout().ty,
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expected_int_bits,
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expected_bytes
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),
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);
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}
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};
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for lane in 0..lane_count {
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let m_lane = fx.bcx.ins().ushr_imm(m, u64::from(lane) as i64);
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