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Ana Hobden 2024-07-18 06:52:16 -07:00
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src/doc/rustc/src/SUMMARY.md
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@ -65,6 +65,7 @@
- [riscv32im-risc0-zkvm-elf](platform-support/riscv32im-risc0-zkvm-elf.md)
- [riscv32imac-unknown-xous-elf](platform-support/riscv32imac-unknown-xous-elf.md)
- [riscv32*-unknown-none-elf](platform-support/riscv32-unknown-none-elf.md)
- [riscv64gc-unknown-linux-gnu](platform-support/riscv64gc-unknown-linux-gnu.md)
- [sparc-unknown-none-elf](./platform-support/sparc-unknown-none-elf.md)
- [*-pc-windows-gnullvm](platform-support/pc-windows-gnullvm.md)
- [\*-nto-qnx-\*](platform-support/nto-qnx.md)

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src/doc/rustc/src/platform-support/riscv64gc-unknown-linux-gnu.md
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@ -7,8 +7,10 @@ RISC-V targets using the *RV64I* base instruction set with the *G* collection of
## Target maintainers
- TODO
- Kito Cheng, <kito.cheng@gmail.com>, [@kito-cheng](https://github.com/kito-cheng)
- Michael Maitland, <michaeltmaitland@gmail.com>, [@michaelmaitland](https://github.com/michaelmaitland)
- Robin Randhawa, <robin.randhawa@sifive.com>, [@robin-randhawa-sifive](https://github.com/robin-randhawa-sifive)
- Craig Topper, <craig.topper@sifive.com>, [@topperc](https://github.com/topperc)
## Requirements