Add conversions between vendor intrinsics (#144)

* Add x86 vendor conversions
* Add wasm32 vendor types
* Add arm vendor types
* Add powerpc vendor types

crates/core_simd/src/lib.rs

@@ -1,6 +1,6 @@
 #![no_std]
 #![allow(incomplete_features)]
-#![feature(repr_simd, platform_intrinsics, simd_ffi, const_generics)]
+#![feature(repr_simd, platform_intrinsics, simd_ffi, const_generics, stdsimd)]
 #![warn(missing_docs)]
 //! Portable SIMD module.
 
@@ -9,8 +9,6 @@ mod first;
 #[macro_use]
 mod permute;
 #[macro_use]
-mod transmute;
-#[macro_use]
 mod reduction;
 
 mod select;
@@ -25,6 +23,7 @@ mod intrinsics;
 mod iter;
 mod ops;
 mod round;
+mod vendor;
 
 mod math;
 

crates/core_simd/src/transmute.rs

@@ -1,28 +0,0 @@
-/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
-#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
-macro_rules! from_transmute {
-    { unsafe $a:ty => $b:ty } => {
-        from_transmute!{ @impl $a => $b }
-        from_transmute!{ @impl $b => $a }
-    };
-    { @impl $from:ty => $to:ty } => {
-        impl core::convert::From<$from> for $to {
-            #[inline]
-            fn from(value: $from) -> $to {
-                unsafe { core::mem::transmute(value) }
-            }
-        }
-    };
-}
-
-/// Provides implementations of `From<$generic> for core::arch::{x86, x86_64}::$intel` and
-/// vice-versa that transmutes the value.
-macro_rules! from_transmute_x86 {
-    { unsafe $generic:ty => $intel:ident } => {
-        #[cfg(target_arch = "x86")]
-        from_transmute! { unsafe $generic => core::arch::x86::$intel }
-
-        #[cfg(target_arch = "x86_64")]
-        from_transmute! { unsafe $generic => core::arch::x86_64::$intel }
-    }
-}

crates/core_simd/src/vector/float.rs

@@ -201,10 +201,6 @@ where
 
 impl_float_vector! { SimdF32, f32, SimdU32, Mask32, SimdI32 }
 
-from_transmute_x86! { unsafe f32x4 => __m128 }
-from_transmute_x86! { unsafe f32x8 => __m256 }
-//from_transmute_x86! { unsafe f32x16 => __m512 }
-
 /// A SIMD vector of containing `LANES` `f64` values.
 #[repr(simd)]
 pub struct SimdF64<const LANES: usize>([f64; LANES])
@@ -213,10 +209,6 @@ where
 
 impl_float_vector! { SimdF64, f64, SimdU64, Mask64, SimdI64 }
 
-from_transmute_x86! { unsafe f64x2 => __m128d }
-from_transmute_x86! { unsafe f64x4 => __m256d }
-//from_transmute_x86! { unsafe f64x8 => __m512d }
-
 /// Vector of two `f32` values
 pub type f32x2 = SimdF32<2>;
 

crates/core_simd/src/vector/int.rs

@@ -67,18 +67,6 @@ where
 
 impl_integer_vector! { SimdIsize, isize, MaskSize, SimdIsize }
 
-#[cfg(target_pointer_width = "32")]
-from_transmute_x86! { unsafe isizex4 => __m128i }
-#[cfg(target_pointer_width = "32")]
-from_transmute_x86! { unsafe isizex8 => __m256i }
-
-#[cfg(target_pointer_width = "64")]
-from_transmute_x86! { unsafe isizex2 => __m128i }
-#[cfg(target_pointer_width = "64")]
-from_transmute_x86! { unsafe isizex4 => __m256i }
-//#[cfg(target_pointer_width = "64")]
-//from_transmute_x86! { unsafe isizex8 => __m512i }
-
 /// A SIMD vector of containing `LANES` `i16` values.
 #[repr(simd)]
 pub struct SimdI16<const LANES: usize>([i16; LANES])
@@ -87,10 +75,6 @@ where
 
 impl_integer_vector! { SimdI16, i16, Mask16, SimdI16 }
 
-from_transmute_x86! { unsafe i16x8 => __m128i }
-from_transmute_x86! { unsafe i16x16 => __m256i }
-//from_transmute_x86! { unsafe i16x32 => __m512i }
-
 /// A SIMD vector of containing `LANES` `i32` values.
 #[repr(simd)]
 pub struct SimdI32<const LANES: usize>([i32; LANES])
@@ -99,10 +83,6 @@ where
 
 impl_integer_vector! { SimdI32, i32, Mask32, SimdI32 }
 
-from_transmute_x86! { unsafe i32x4 => __m128i }
-from_transmute_x86! { unsafe i32x8 => __m256i }
-//from_transmute_x86! { unsafe i32x16 => __m512i }
-
 /// A SIMD vector of containing `LANES` `i64` values.
 #[repr(simd)]
 pub struct SimdI64<const LANES: usize>([i64; LANES])
@@ -111,10 +91,6 @@ where
 
 impl_integer_vector! { SimdI64, i64, Mask64, SimdI64 }
 
-from_transmute_x86! { unsafe i64x2 => __m128i }
-from_transmute_x86! { unsafe i64x4 => __m256i }
-//from_transmute_x86! { unsafe i64x8 => __m512i }
-
 /// A SIMD vector of containing `LANES` `i8` values.
 #[repr(simd)]
 pub struct SimdI8<const LANES: usize>([i8; LANES])
@@ -123,10 +99,6 @@ where
 
 impl_integer_vector! { SimdI8, i8, Mask8, SimdI8 }
 
-from_transmute_x86! { unsafe i8x16 => __m128i }
-from_transmute_x86! { unsafe i8x32 => __m256i }
-//from_transmute_x86! { unsafe i8x64 => __m512i }
-
 /// Vector of two `isize` values
 pub type isizex2 = SimdIsize<2>;
 

crates/core_simd/src/vector/uint.rs

@@ -36,18 +36,6 @@ where
 
 impl_unsigned_vector! { SimdUsize, usize }
 
-#[cfg(target_pointer_width = "32")]
-from_transmute_x86! { unsafe usizex4 => __m128i }
-#[cfg(target_pointer_width = "32")]
-from_transmute_x86! { unsafe usizex8 => __m256i }
-
-#[cfg(target_pointer_width = "64")]
-from_transmute_x86! { unsafe usizex2 => __m128i }
-#[cfg(target_pointer_width = "64")]
-from_transmute_x86! { unsafe usizex4 => __m256i }
-//#[cfg(target_pointer_width = "64")]
-//from_transmute_x86! { unsafe usizex8 => __m512i }
-
 /// A SIMD vector of containing `LANES` `u16` values.
 #[repr(simd)]
 pub struct SimdU16<const LANES: usize>([u16; LANES])
@@ -56,10 +44,6 @@ where
 
 impl_unsigned_vector! { SimdU16, u16 }
 
-from_transmute_x86! { unsafe u16x8 => __m128i }
-from_transmute_x86! { unsafe u16x16 => __m256i }
-//from_transmute_x86! { unsafe u16x32 => __m512i }
-
 /// A SIMD vector of containing `LANES` `u32` values.
 #[repr(simd)]
 pub struct SimdU32<const LANES: usize>([u32; LANES])
@@ -68,10 +52,6 @@ where
 
 impl_unsigned_vector! { SimdU32, u32 }
 
-from_transmute_x86! { unsafe u32x4 => __m128i }
-from_transmute_x86! { unsafe u32x8 => __m256i }
-//from_transmute_x86! { unsafe u32x16 => __m512i }
-
 /// A SIMD vector of containing `LANES` `u64` values.
 #[repr(simd)]
 pub struct SimdU64<const LANES: usize>([u64; LANES])
@@ -80,10 +60,6 @@ where
 
 impl_unsigned_vector! { SimdU64, u64 }
 
-from_transmute_x86! { unsafe u64x2 => __m128i }
-from_transmute_x86! { unsafe u64x4 => __m256i }
-//from_transmute_x86! { unsafe u64x8 => __m512i }
-
 /// A SIMD vector of containing `LANES` `u8` values.
 #[repr(simd)]
 pub struct SimdU8<const LANES: usize>([u8; LANES])
@@ -92,10 +68,6 @@ where
 
 impl_unsigned_vector! { SimdU8, u8 }
 
-from_transmute_x86! { unsafe u8x16 => __m128i }
-from_transmute_x86! { unsafe u8x32 => __m256i }
-//from_transmute_x86! { unsafe u8x64 => __m512i }
-
 /// Vector of two `usize` values
 pub type usizex2 = SimdUsize<2>;
 

crates/core_simd/src/vendor.rs

@@ -0,0 +1,27 @@
+/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
+macro_rules! from_transmute {
+    { unsafe $a:ty => $b:ty } => {
+        from_transmute!{ @impl $a => $b }
+        from_transmute!{ @impl $b => $a }
+    };
+    { @impl $from:ty => $to:ty } => {
+        impl core::convert::From<$from> for $to {
+            #[inline]
+            fn from(value: $from) -> $to {
+                unsafe { core::mem::transmute(value) }
+            }
+        }
+    };
+}
+
+#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+mod x86;
+
+#[cfg(any(target_arch = "wasm32"))]
+mod wasm32;
+
+#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
+mod arm;
+
+#[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))]
+mod powerpc;

crates/core_simd/src/vendor/arm.rs

@@ -0,0 +1,53 @@
+use crate::*;
+
+#[cfg(target_arch = "arm")]
+use core::arch::arm::*;
+
+#[cfg(target_arch = "aarch64")]
+use core::arch::aarch64::*;
+
+from_transmute! { unsafe f32x2 => float32x2_t }
+from_transmute! { unsafe f32x4 => float32x4_t }
+
+from_transmute! { unsafe u8x8 => uint8x8_t }
+from_transmute! { unsafe u8x16 => uint8x16_t }
+from_transmute! { unsafe i8x8 => int8x8_t }
+from_transmute! { unsafe i8x16 => int8x16_t }
+from_transmute! { unsafe u8x8 => poly8x8_t }
+from_transmute! { unsafe u8x16 => poly8x16_t }
+
+from_transmute! { unsafe u16x4 => uint16x4_t }
+from_transmute! { unsafe u16x8 => uint16x8_t }
+from_transmute! { unsafe i16x4 => int16x4_t }
+from_transmute! { unsafe i16x8 => int16x8_t }
+from_transmute! { unsafe u16x4 => poly16x4_t }
+from_transmute! { unsafe u16x8 => poly16x8_t }
+
+from_transmute! { unsafe u32x2 => uint32x2_t }
+from_transmute! { unsafe u32x4 => uint32x4_t }
+from_transmute! { unsafe i32x2 => int32x2_t }
+from_transmute! { unsafe i32x4 => int32x4_t }
+
+from_transmute! { unsafe SimdU64<1> => uint64x1_t }
+from_transmute! { unsafe u64x2 => uint64x2_t }
+from_transmute! { unsafe SimdI64<1> => int64x1_t }
+from_transmute! { unsafe i64x2 => int64x2_t }
+from_transmute! { unsafe SimdU64<1> => poly64x1_t }
+from_transmute! { unsafe u64x2 => poly64x2_t }
+
+#[cfg(target_arch = "arm")]
+mod arm {
+    use super::*;
+    from_transmute! { unsafe SimdU8<4> => uint8x4_t }
+    from_transmute! { unsafe SimdI8<4> => int8x4_t }
+
+    from_transmute! { unsafe SimdU16<2> => uint16x2_t }
+    from_transmute! { unsafe SimdI16<2> => int16x2_t }
+}
+
+#[cfg(target_arch = "aarch64")]
+mod aarch64 {
+    use super::*;
+    from_transmute! { unsafe SimdF64<1> => float64x1_t }
+    from_transmute! { unsafe f64x2 => float64x2_t }
+}

crates/core_simd/src/vendor/powerpc.rs

@@ -0,0 +1,11 @@
+use crate::*;
+
+#[cfg(target_arch = "powerpc")]
+use core::arch::powerpc::*;
+
+#[cfg(target_arch = "powerpc64")]
+use core::arch::powerpc64::*;
+
+from_transmute! { unsafe f64x2 => vector_double }
+from_transmute! { unsafe i64x2 => vector_signed_long }
+from_transmute! { unsafe u64x2 => vector_unsigned_long }

crates/core_simd/src/vendor/wasm32.rs

@@ -0,0 +1,30 @@
+use crate::*;
+use core::arch::wasm32::v128;
+
+from_transmute! { unsafe u8x16 => v128 }
+from_transmute! { unsafe i8x16 => v128 }
+
+from_transmute! { unsafe u16x8 => v128 }
+from_transmute! { unsafe i16x8 => v128 }
+
+from_transmute! { unsafe u32x4 => v128 }
+from_transmute! { unsafe i32x4 => v128 }
+from_transmute! { unsafe f32x4 => v128 }
+
+from_transmute! { unsafe u64x2 => v128 }
+from_transmute! { unsafe i64x2 => v128 }
+from_transmute! { unsafe f64x2 => v128 }
+
+#[cfg(target_pointer_width = "32")]
+mod p32 {
+    use super::*;
+    from_transmute! { unsafe usizex4 => v128 }
+    from_transmute! { unsafe isizex4 => v128 }
+}
+
+#[cfg(target_pointer_width = "64")]
+mod p64 {
+    use super::*;
+    from_transmute! { unsafe usizex2 => v128 }
+    from_transmute! { unsafe isizex2 => v128 }
+}

crates/core_simd/src/vendor/x86.rs

@@ -0,0 +1,63 @@
+use crate::*;
+
+#[cfg(any(target_arch = "x86"))]
+use core::arch::x86::*;
+
+#[cfg(target_arch = "x86_64")]
+use core::arch::x86_64::*;
+
+from_transmute! { unsafe u8x16 => __m128i }
+from_transmute! { unsafe u8x32 => __m256i }
+//from_transmute! { unsafe u8x64 => __m512i }
+from_transmute! { unsafe i8x16 => __m128i }
+from_transmute! { unsafe i8x32 => __m256i }
+//from_transmute! { unsafe i8x64 => __m512i }
+
+from_transmute! { unsafe u16x8 => __m128i }
+from_transmute! { unsafe u16x16 => __m256i }
+from_transmute! { unsafe u16x32 => __m512i }
+from_transmute! { unsafe i16x8 => __m128i }
+from_transmute! { unsafe i16x16 => __m256i }
+from_transmute! { unsafe i16x32 => __m512i }
+
+from_transmute! { unsafe u32x4 => __m128i }
+from_transmute! { unsafe u32x8 => __m256i }
+from_transmute! { unsafe u32x16 => __m512i }
+from_transmute! { unsafe i32x4 => __m128i }
+from_transmute! { unsafe i32x8 => __m256i }
+from_transmute! { unsafe i32x16 => __m512i }
+from_transmute! { unsafe f32x4 => __m128 }
+from_transmute! { unsafe f32x8 => __m256 }
+from_transmute! { unsafe f32x16 => __m512 }
+
+from_transmute! { unsafe u64x2 => __m128i }
+from_transmute! { unsafe u64x4 => __m256i }
+from_transmute! { unsafe u64x8 => __m512i }
+from_transmute! { unsafe i64x2 => __m128i }
+from_transmute! { unsafe i64x4 => __m256i }
+from_transmute! { unsafe i64x8 => __m512i }
+from_transmute! { unsafe f64x2 => __m128d }
+from_transmute! { unsafe f64x4 => __m256d }
+from_transmute! { unsafe f64x8 => __m512d }
+
+#[cfg(target_pointer_width = "32")]
+mod p32 {
+    use super::*;
+    from_transmute! { unsafe usizex4 => __m128i }
+    from_transmute! { unsafe usizex8 => __m256i }
+    from_transmute! { unsafe SimdUsize<16> => __m512i }
+    from_transmute! { unsafe isizex4 => __m128i }
+    from_transmute! { unsafe isizex8 => __m256i }
+    from_transmute! { unsafe SimdIsize<16> => __m512i }
+}
+
+#[cfg(target_pointer_width = "64")]
+mod p64 {
+    use super::*;
+    from_transmute! { unsafe usizex2 => __m128i }
+    from_transmute! { unsafe usizex4 => __m256i }
+    from_transmute! { unsafe usizex8 => __m512i }
+    from_transmute! { unsafe isizex2 => __m128i }
+    from_transmute! { unsafe isizex4 => __m256i }
+    from_transmute! { unsafe isizex8 => __m512i }
+}