Add more SIMD
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@ -171,10 +171,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
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new_args.push(last_arg);
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args = new_args.into();
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},
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"__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" | "__builtin_ia32_vpmadd52huq512_mask"
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| "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
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| "__builtin_ia32_vpmadd52huq128_mask"
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=> {
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"__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
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let mut new_args = args.to_vec();
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let last_arg = new_args.pop().expect("last arg");
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let arg4_type = gcc_func.get_param_type(3);
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@ -188,7 +185,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
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| "__builtin_ia32_vpermi2varq256_mask" | "__builtin_ia32_vpermi2varq128_mask"
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| "__builtin_ia32_vpermi2varps512_mask" | "__builtin_ia32_vpermi2varps256_mask"
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| "__builtin_ia32_vpermi2varps128_mask" | "__builtin_ia32_vpermi2varpd512_mask"
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| "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" => {
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| "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" | "__builtin_ia32_vpmadd52huq512_mask"
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| "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
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| "__builtin_ia32_vpmadd52huq128_mask"
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=> {
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let mut new_args = args.to_vec();
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let arg4_type = gcc_func.get_param_type(3);
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let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
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@ -513,10 +513,10 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
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"llvm.x86.avx512.mask.compress.store.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
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"llvm.x86.avx512.mask.compress.store.b.256" => "__builtin_ia32_compressstoreuqi256_mask",
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"llvm.x86.avx512.mask.compress.store.b.128" => "__builtin_ia32_compressstoreuqi128_mask",
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"llvm.x86.avx512.mask.compress.w.512" => "__builtin_ia32_compressstoreuhi512_mask",
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"llvm.x86.avx512.mask.compress.w.512" => "__builtin_ia32_compresshi512_mask",
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"llvm.x86.avx512.mask.compress.w.256" => "__builtin_ia32_compresshi256_mask",
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"llvm.x86.avx512.mask.compress.w.128" => "__builtin_ia32_compresshi128_mask",
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"llvm.x86.avx512.mask.compress.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
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"llvm.x86.avx512.mask.compress.b.512" => "__builtin_ia32_compressqi512_mask",
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"llvm.x86.avx512.mask.compress.b.256" => "__builtin_ia32_compressqi256_mask",
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"llvm.x86.avx512.mask.compress.b.128" => "__builtin_ia32_compressqi128_mask",
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"llvm.x86.avx512.mask.expand.w.512" => "__builtin_ia32_expandhi512_mask",
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@ -674,6 +674,18 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
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"llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
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"llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
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"llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
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"llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd_v16si",
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"llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd_v8si",
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"llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd_v4si",
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"llvm.x86.avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds_v16si",
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"llvm.x86.avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds_v8si",
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"llvm.x86.avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds_v4si",
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"llvm.x86.avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd_v16si",
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"llvm.x86.avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd_v8si",
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"llvm.x86.avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd_v4si",
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"llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds_v16si",
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"llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds_v8si",
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"llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
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// NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
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_ => include!("archs.rs"),
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