2015-07-16 18:46:36 -05:00
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// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
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// file at the top-level directory of this distribution and at
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// http://rust-lang.org/COPYRIGHT.
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//
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// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
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// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
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// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
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// option. This file may not be copied, modified, or distributed
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// except according to those terms.
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use {Intrinsic, i, f, v};
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use rustc::middle::ty;
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macro_rules! p {
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($name: expr, ($($inputs: tt),*) -> $output: tt) => {
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plain!(concat!("llvm.arm.neon.", $name), ($($inputs),*) -> $output)
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}
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}
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pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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if !name.starts_with("v") { return None }
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Some(match &name["v".len()..] {
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2015-08-11 19:44:18 -05:00
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"sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
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"sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
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"hadd_s8" => p!("vhadds.v8i8", (i8x8, i8x8) -> i8x8),
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"haddq_s8" => p!("vhadds.v16i8", (i8x16, i8x16) -> i8x16),
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"hadd_s16" => p!("vhadds.v4i16", (i16x4, i16x4) -> i16x4),
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"haddq_s16" => p!("vhadds.v8i16", (i16x8, i16x8) -> i16x8),
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"hadd_s32" => p!("vhadds.v2i32", (i32x2, i32x2) -> i32x2),
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"haddq_s32" => p!("vhadds.v4i32", (i32x4, i32x4) -> i32x4),
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"hadd_u8" => p!("vhaddu.v8i8", (i8x8, i8x8) -> i8x8),
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"haddq_u8" => p!("vhaddu.v16i8", (i8x16, i8x16) -> i8x16),
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"hadd_u16" => p!("vhaddu.v4i16", (i16x4, i16x4) -> i16x4),
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"haddq_u16" => p!("vhaddu.v8i16", (i16x8, i16x8) -> i16x8),
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"hadd_u32" => p!("vhaddu.v2i32", (i32x2, i32x2) -> i32x2),
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"haddq_u32" => p!("vhaddu.v4i32", (i32x4, i32x4) -> i32x4),
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"rhadd_s8" => p!("vrhadds.v8i8", (i8x8, i8x8) -> i8x8),
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"rhaddq_s8" => p!("vrhadds.v16i8", (i8x16, i8x16) -> i8x16),
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"rhadd_s16" => p!("vrhadds.v4i16", (i16x4, i16x4) -> i16x4),
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"rhaddq_s16" => p!("vrhadds.v8i16", (i16x8, i16x8) -> i16x8),
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"rhadd_s32" => p!("vrhadds.v2i32", (i32x2, i32x2) -> i32x2),
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"rhaddq_s32" => p!("vrhadds.v4i32", (i32x4, i32x4) -> i32x4),
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"rhadd_u8" => p!("vrhaddu.v8i8", (i8x8, i8x8) -> i8x8),
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"rhaddq_u8" => p!("vrhaddu.v16i8", (i8x16, i8x16) -> i8x16),
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"rhadd_u16" => p!("vrhaddu.v4i16", (i16x4, i16x4) -> i16x4),
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"rhaddq_u16" => p!("vrhaddu.v8i16", (i16x8, i16x8) -> i16x8),
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"rhadd_u32" => p!("vrhaddu.v2i32", (i32x2, i32x2) -> i32x2),
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"rhaddq_u32" => p!("vrhaddu.v4i32", (i32x4, i32x4) -> i32x4),
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"qadd_s8" => p!("vqadds.v8i8", (i8x8, i8x8) -> i8x8),
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"qaddq_s8" => p!("vqadds.v16i8", (i8x16, i8x16) -> i8x16),
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"qadd_s16" => p!("vqadds.v4i16", (i16x4, i16x4) -> i16x4),
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"qaddq_s16" => p!("vqadds.v8i16", (i16x8, i16x8) -> i16x8),
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"qadd_s32" => p!("vqadds.v2i32", (i32x2, i32x2) -> i32x2),
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"qaddq_s32" => p!("vqadds.v4i32", (i32x4, i32x4) -> i32x4),
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"qadd_s64" => p!("vqaddu.v1i64", (i64x1, i64x1) -> i64x1),
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"qaddq_s64" => p!("vqaddu.v2i64", (i64x2, i64x2) -> i64x2),
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"qadd_u8" => p!("vqaddu.v8i8", (i8x8, i8x8) -> i8x8),
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"qaddq_u8" => p!("vqaddu.v16i8", (i8x16, i8x16) -> i8x16),
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"qadd_u16" => p!("vqaddu.v4i16", (i16x4, i16x4) -> i16x4),
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"qaddq_u16" => p!("vqaddu.v8i16", (i16x8, i16x8) -> i16x8),
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"qadd_u32" => p!("vqaddu.v2i32", (i32x2, i32x2) -> i32x2),
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"qaddq_u32" => p!("vqaddu.v4i32", (i32x4, i32x4) -> i32x4),
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"qadd_u64" => p!("vqaddu.v1i64", (i64x1, i64x1) -> i64x1),
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"qaddq_u64" => p!("vqaddu.v2i64", (i64x2, i64x2) -> i64x2),
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"raddhn_s16" => p!("vraddhn.v8i8", (i16x8, i16x8) -> i8x8),
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"raddhn_s32" => p!("vraddhn.v4i16", (i32x4, i32x4) -> i16x4),
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"raddhn_s64" => p!("vraddhn.v2i32", (i64x2, i64x2) -> i32x2),
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"fma_f32" => plain!("llvm.fma.v2f32", (f32x2, f32x2, f32x2) -> f32x2),
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"fmaq_f32" => plain!("llvm.fma.v4f32", (f32x4, f32x4, f32x4) -> f32x4),
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"qdmulh_s16" => p!("vqdmulh.v4i16", (i16x4, i16x4) -> i16x4),
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"qdmulhq_s16" => p!("vqdmulh.v8i16", (i16x8, i16x8) -> i16x8),
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"qdmulh_s32" => p!("vqdmulh.v2i32", (i32x2, i32x2) -> i32x4),
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"qdmulhq_s32" => p!("vqdmulh.v4i32", (i32x4, i32x4) -> i32x4),
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"qrdmulh_s16" => p!("vqrdmulh.v4i16", (i16x4, i16x4) -> i16x4),
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"qrdmulhqr_s16" => p!("vqrdmulh.v8i16", (i16x8, i16x8) -> i16x8),
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"qrdmulh_s32" => p!("vqrdmulh.v2i32", (i32x2, i32x2) -> i32x4),
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"qrdmulhqr_s32" => p!("vqrdmulh.v4i32", (i32x4, i32x4) -> i32x4),
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"mull_s8" => p!("vmulls.v8i16", (i8x8, i8x8) -> i16x8),
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"mull_s16" => p!("vmulls.v4i32", (i16x4, i16x4) -> i32x4),
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"mull_s32" => p!("vmulls.v2i64", (i32x2, i32x2) -> i64x2),
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"mull_u8" => p!("vmullu.v8i16", (i8x8, i8x8) -> i16x8),
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"mull_u16" => p!("vmullu.v4i32", (i16x4, i16x4) -> i32x4),
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"mull_u32" => p!("vmullu.v2i64", (i32x2, i32x2) -> i64x2),
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"qdmull_s16" => p!("vqdmull.v4i32", (i16x4, i16x4) -> i32x4),
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"qdmull_s32" => p!("vqdmull.v2i64", (i32x2, i32x2) -> i64x2),
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"hsub_s8" => p!("vhsubs.v8i8", (i8x8, i8x8) -> i8x8),
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"hsubq_s8" => p!("vhsubs.v16i8", (i8x16, i8x16) -> i8x16),
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"hsub_s16" => p!("vhsubs.v4i16", (i16x4, i16x4) -> i16x4),
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"hsubq_s16" => p!("vhsubs.v8i16", (i16x8, i16x8) -> i16x8),
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"hsub_s32" => p!("vhsubs.v2i32", (i32x2, i32x2) -> i32x2),
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"hsubq_s32" => p!("vhsubs.v4i32", (i32x4, i32x4) -> i32x4),
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"hsub_u8" => p!("vhsubu.v8i8", (i8x8, i8x8) -> i8x8),
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"hsubq_u8" => p!("vhsubu.v16i8", (i8x16, i8x16) -> i8x16),
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"hsub_u16" => p!("vhsubu.v4i16", (i16x4, i16x4) -> i16x4),
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"hsubq_u16" => p!("vhsubu.v8i16", (i16x8, i16x8) -> i16x8),
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"hsub_u32" => p!("vhsubu.v2i32", (i32x2, i32x2) -> i32x2),
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"hsubq_u32" => p!("vhsubu.v4i32", (i32x4, i32x4) -> i32x4),
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"qsub_s8" => p!("vqsubs.v8i8", (i8x8, i8x8) -> i8x8),
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"qsubq_s8" => p!("vqsubs.v16i8", (i8x16, i8x16) -> i8x16),
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"qsub_s16" => p!("vqsubs.v4i16", (i16x4, i16x4) -> i16x4),
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"qsubq_s16" => p!("vqsubs.v8i16", (i16x8, i16x8) -> i16x8),
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"qsub_s32" => p!("vqsubs.v2i32", (i32x2, i32x2) -> i32x2),
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"qsubq_s32" => p!("vqsubs.v4i32", (i32x4, i32x4) -> i32x4),
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"qsub_s64" => p!("vqsubu.v1i64", (i64x1, i64x1) -> i64x1),
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"qsubq_s64" => p!("vqsubu.v2i64", (i64x2, i64x2) -> i64x2),
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"qsub_u8" => p!("vqsubu.v8i8", (i8x8, i8x8) -> i8x8),
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"qsubq_u8" => p!("vqsubu.v16i8", (i8x16, i8x16) -> i8x16),
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"qsub_u16" => p!("vqsubu.v4i16", (i16x4, i16x4) -> i16x4),
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"qsubq_u16" => p!("vqsubu.v8i16", (i16x8, i16x8) -> i16x8),
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"qsub_u32" => p!("vqsubu.v2i32", (i32x2, i32x2) -> i32x2),
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"qsubq_u32" => p!("vqsubu.v4i32", (i32x4, i32x4) -> i32x4),
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"qsub_u64" => p!("vqsubu.v1i64", (i64x1, i64x1) -> i64x1),
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"qsubq_u64" => p!("vqsubu.v2i64", (i64x2, i64x2) -> i64x2),
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"abd_s8" => p!("vabds.v8i8", (i8x8, i8x8) -> i8x8),
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"abdq_s8" => p!("vabds.v16i8", (i8x16, i8x16) -> i8x16),
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"abd_s16" => p!("vabds.v4i16", (i16x4, i16x4) -> i16x4),
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"abdq_s16" => p!("vabds.v8i16", (i16x8, i16x8) -> i16x8),
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"abd_s32" => p!("vabds.v2i32", (i32x2, i32x2) -> i32x2),
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"abdq_s32" => p!("vabds.v4i32", (i32x4, i32x4) -> i32x4),
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"abd_u8" => p!("vabdu.v8i8", (i8x8, i8x8) -> i8x8),
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"abdq_u8" => p!("vabdu.v16i8", (i8x16, i8x16) -> i8x16),
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"abd_u16" => p!("vabdu.v4i16", (i16x4, i16x4) -> i16x4),
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"abdq_u16" => p!("vabdu.v8i16", (i16x8, i16x8) -> i16x8),
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"abd_u32" => p!("vabdu.v2i32", (i32x2, i32x2) -> i32x2),
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"abdq_u32" => p!("vabdu.v4i32", (i32x4, i32x4) -> i32x4),
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"abd_f32" => p!("vabds.v2f32", (f32x2, f32x2) -> f32x2),
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"abdq_f32" => p!("vabds.v4f32", (f32x4, f32x4) -> f32x4),
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"max_s8" => p!("vmaxs.v8i8", (i8x8, i8x8) -> i8x8),
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"maxq_s8" => p!("vmaxs.v16i8", (i8x16, i8x16) -> i8x16),
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"max_s16" => p!("vmaxs.v4i16", (i16x4, i16x4) -> i16x4),
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"maxq_s16" => p!("vmaxs.v8i16", (i16x8, i16x8) -> i16x8),
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"max_s32" => p!("vmaxs.v2i32", (i32x2, i32x2) -> i32x2),
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"maxq_s32" => p!("vmaxs.v4i32", (i32x4, i32x4) -> i32x4),
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"max_u8" => p!("vmaxu.v8i8", (i8x8, i8x8) -> i8x8),
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"maxq_u8" => p!("vmaxu.v16i8", (i8x16, i8x16) -> i8x16),
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"max_u16" => p!("vmaxu.v4i16", (i16x4, i16x4) -> i16x4),
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"maxq_u16" => p!("vmaxu.v8i16", (i16x8, i16x8) -> i16x8),
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"max_u32" => p!("vmaxu.v2i32", (i32x2, i32x2) -> i32x2),
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"maxq_u32" => p!("vmaxu.v4i32", (i32x4, i32x4) -> i32x4),
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"max_f32" => p!("vmaxs.v2f32", (f32x2, f32x2) -> f32x2),
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"maxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
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"min_s8" => p!("vmins.v8i8", (i8x8, i8x8) -> i8x8),
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"minq_s8" => p!("vmins.v16i8", (i8x16, i8x16) -> i8x16),
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"min_s16" => p!("vmins.v4i16", (i16x4, i16x4) -> i16x4),
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"minq_s16" => p!("vmins.v8i16", (i16x8, i16x8) -> i16x8),
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"min_s32" => p!("vmins.v2i32", (i32x2, i32x2) -> i32x2),
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"minq_s32" => p!("vmins.v4i32", (i32x4, i32x4) -> i32x4),
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"min_u8" => p!("vminu.v8i8", (i8x8, i8x8) -> i8x8),
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"minq_u8" => p!("vminu.v16i8", (i8x16, i8x16) -> i8x16),
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"min_u16" => p!("vminu.v4i16", (i16x4, i16x4) -> i16x4),
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"minq_u16" => p!("vminu.v8i16", (i16x8, i16x8) -> i16x8),
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"min_u32" => p!("vminu.v2i32", (i32x2, i32x2) -> i32x2),
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"minq_u32" => p!("vminu.v4i32", (i32x4, i32x4) -> i32x4),
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"min_f32" => p!("vmins.v2f32", (f32x2, f32x2) -> f32x2),
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"minq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
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"shl_s8" => p!("vshifts.v8i8", (i8x8, i8x8) -> i8x8),
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"shlq_s8" => p!("vshifts.v16i8", (i8x16, i8x16) -> i8x16),
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"shl_s16" => p!("vshifts.v4i16", (i16x4, i16x4) -> i16x4),
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"shlq_s16" => p!("vshifts.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"shl_s32" => p!("vshifts.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"shlq_s32" => p!("vshifts.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"shl_s64" => p!("vshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"shlq_s64" => p!("vshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"shl_u8" => p!("vshiftu.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"shlq_u8" => p!("vshiftu.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"shl_u16" => p!("vshiftu.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"shlq_u16" => p!("vshiftu.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"shl_u32" => p!("vshiftu.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"shlq_u32" => p!("vshiftu.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"shl_u64" => p!("vshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"shlq_u64" => p!("vshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"qshl_s8" => p!("vqshifts.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"qshlq_s8" => p!("vqshifts.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"qshl_s16" => p!("vqshifts.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"qshlq_s16" => p!("vqshifts.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"qshl_s32" => p!("vqshifts.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"qshlq_s32" => p!("vqshifts.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"qshl_s64" => p!("vqshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"qshlq_s64" => p!("vqshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"qshl_u8" => p!("vqshiftu.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"qshlq_u8" => p!("vqshiftu.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"qshl_u16" => p!("vqshiftu.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"qshlq_u16" => p!("vqshiftu.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"qshl_u32" => p!("vqshiftu.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"qshlq_u32" => p!("vqshiftu.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"qshl_u64" => p!("vqshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"qshlq_u64" => p!("vqshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"rshl_s8" => p!("vrshifts.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"rshlr_s8" => p!("vrshifts.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"rshl_s16" => p!("vrshifts.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"rshlr_s16" => p!("vrshifts.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"rshl_s32" => p!("vrshifts.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"rshlr_s32" => p!("vrshifts.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"rshl_s64" => p!("vrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"rshlr_s64" => p!("vrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"rshl_u8" => p!("vrshiftu.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"rshlr_u8" => p!("vrshiftu.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"rshl_u16" => p!("vrshiftu.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"rshlr_u16" => p!("vrshiftu.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"rshl_u32" => p!("vrshiftu.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"rshlr_u32" => p!("vrshiftu.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"rshl_u64" => p!("vrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"rshlr_u64" => p!("vrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"qrshl_s8" => p!("vqrshifts.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"qrshlqr_s8" => p!("vqrshifts.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"qrshl_s16" => p!("vqrshifts.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"qrshlqr_s16" => p!("vqrshifts.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"qrshl_s32" => p!("vqrshifts.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"qrshlqr_s32" => p!("vqrshifts.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"qrshl_s64" => p!("vqrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"qrshlqr_s64" => p!("vqrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"qrshl_u8" => p!("vqrshiftu.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"qrshlqr_u8" => p!("vqrshiftu.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"qrshl_u16" => p!("vqrshiftu.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"qrshlqr_u16" => p!("vqrshiftu.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"qrshl_u32" => p!("vqrshiftu.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"qrshlqr_u32" => p!("vqrshiftu.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"qrshl_u64" => p!("vqrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
|
|
|
|
|
"qrshlqr_u64" => p!("vqrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
|
|
|
|
|
"qmovn_s16" => p!("vqmovns.v8i8", (i16x8) -> i8x8),
|
|
|
|
|
"qmovn_s32" => p!("vqmovns.v4i16", (i32x4) -> i16x4),
|
|
|
|
|
"qmovn_s64" => p!("vqmovns.v2i32", (i64x2) -> i32x2),
|
|
|
|
|
"qmovn_u16" => p!("vqmovnu.v8i8", (i16x8) -> i8x8),
|
|
|
|
|
"qmovn_u32" => p!("vqmovnu.v4i16", (i32x4) -> i16x4),
|
|
|
|
|
"qmovn_u64" => p!("vqmovnu.v2i32", (i64x2) -> i32x2),
|
|
|
|
|
"qmovun_s16" => p!("vqmovnsu.v8i8", (i16x8) -> i8x8),
|
|
|
|
|
"qmovun_s32" => p!("vqmovnsu.v4i16", (i32x4) -> i16x4),
|
|
|
|
|
"qmovun_s64" => p!("vqmovnsu.v2i32", (i64x2) -> i32x2),
|
|
|
|
|
"abs_s8" => p!("vabs.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"absq_s8" => p!("vabs.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"abs_s16" => p!("vabs.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"absq_s16" => p!("vabs.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"abs_s32" => p!("vabs.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"absq_s32" => p!("vabs.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"abs_f32" => p!("vabs.v2f32", (f32x2, f32x2) -> f32x2),
|
|
|
|
|
"absq_f32" => p!("vabs.v4f32", (f32x4, f32x4) -> f32x4),
|
|
|
|
|
"qabs_s8" => p!("vqabs.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"qabsq_s8" => p!("vqabs.v16i8", (i8x16, i8x16) -> i8x16),
|
|
|
|
|
"qabs_s16" => p!("vqabs.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"qabsq_s16" => p!("vqabs.v8i16", (i16x8, i16x8) -> i16x8),
|
|
|
|
|
"qabs_s32" => p!("vqabs.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"qabsq_s32" => p!("vqabs.v4i32", (i32x4, i32x4) -> i32x4),
|
|
|
|
|
"neg_s8" => p!("vneg.v8i8", (i8x8) -> i8x8),
|
|
|
|
|
"negq_s8" => p!("vneg.v16i8", (i8x16) -> i8x16),
|
|
|
|
|
"neg_s16" => p!("vneg.v4i16", (i16x4) -> i16x4),
|
|
|
|
|
"negq_s16" => p!("vneg.v8i16", (i16x8) -> i16x8),
|
|
|
|
|
"neg_s32" => p!("vneg.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"negq_s32" => p!("vneg.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"neg_f32" => p!("vneg.v2f32", (f32x2) -> f32x2),
|
|
|
|
|
"negq_f32" => p!("vneg.v4f32", (f32x4) -> f32x4),
|
|
|
|
|
"qneg_s8" => p!("vqneg.v8i8", (i8x8) -> i8x8),
|
|
|
|
|
"qnegq_s8" => p!("vqneg.v16i8", (i8x16) -> i8x16),
|
|
|
|
|
"qneg_s16" => p!("vqneg.v4i16", (i16x4) -> i16x4),
|
|
|
|
|
"qnegq_s16" => p!("vqneg.v8i16", (i16x8) -> i16x8),
|
|
|
|
|
"qneg_s32" => p!("vqneg.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"qnegq_s32" => p!("vqneg.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"cls_s8" => p!("vcls.v8i8", (i8x8) -> i8x8),
|
|
|
|
|
"clsq_s8" => p!("vcls.v16i8", (i8x16) -> i8x16),
|
|
|
|
|
"cls_s16" => p!("vcls.v4i16", (i16x4) -> i16x4),
|
|
|
|
|
"clsq_s16" => p!("vcls.v8i16", (i16x8) -> i16x8),
|
|
|
|
|
"cls_s32" => p!("vcls.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"clsq_s32" => p!("vcls.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"clz_s8" => p!("vclz.v8i8", (i8x8) -> i8x8),
|
|
|
|
|
"clzq_s8" => p!("vclz.v16i8", (i8x16) -> i8x16),
|
|
|
|
|
"clz_s16" => p!("vclz.v4i16", (i16x4) -> i16x4),
|
|
|
|
|
"clzq_s16" => p!("vclz.v8i16", (i16x8) -> i16x8),
|
|
|
|
|
"clz_s32" => p!("vclz.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"clzq_s32" => p!("vclz.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"cnt_s8" => p!("vcnt.v8i8", (i8x8) -> i8x8),
|
|
|
|
|
"cntq_s8" => p!("vcnt.v16i8", (i8x16) -> i8x16),
|
|
|
|
|
"recpe_u32" => p!("vrecpe.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"recpeq_u32" => p!("vrecpe.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"recpe_f32" => p!("vrecpe.v2f32", (f32x2) -> f32x2),
|
|
|
|
|
"recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
|
|
|
|
|
"recps_f32" => p!("vrecps.v2f32", (f32x2, f32x2) -> f32x2),
|
|
|
|
|
"recpsq_f32" => p!("vrecps.v4f32", (f32x4, f32x4) -> f32x4),
|
|
|
|
|
"rsqrte_u32" => p!("vrsqrte.v2i32", (i32x2) -> i32x2),
|
|
|
|
|
"rsqrteq_u32" => p!("vrsqrte.v4i32", (i32x4) -> i32x4),
|
|
|
|
|
"rsqrte_f32" => p!("vrsqrte.v2f32", (f32x2) -> f32x2),
|
|
|
|
|
"rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
|
|
|
|
|
"rsqrts_f32" => p!("vrsqrts.v2f32", (f32x2, f32x2) -> f32x2),
|
|
|
|
|
"rsqrtsq_f32" => p!("vrsqrts.v4f32", (f32x4, f32x4) -> f32x4),
|
|
|
|
|
"bsl_s8" => p!("vsl.v8i8", (i8x8, i8x8, i8x8) -> i8x8),
|
|
|
|
|
"bslq_s8" => p!("vsl.v16i8", (i8x16, i8x16, i8x16) -> i8x16),
|
|
|
|
|
"padd_s8" => p!("vpadd.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"padd_s16" => p!("vpadd.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"padd_s32" => p!("vpadd.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"padd_u8" => p!("vpadd.v8i8", (i8x8, i8x8) -> i8x8),
|
|
|
|
|
"padd_u16" => p!("vpadd.v4i16", (i16x4, i16x4) -> i16x4),
|
|
|
|
|
"padd_u32" => p!("vpadd.v2i32", (i32x2, i32x2) -> i32x2),
|
|
|
|
|
"padd_f32" => p!("vpadd.v2f32", (f32x2, f32x2) -> f32x2),
|
|
|
|
|
"paddl_s8" => p!("vpaddls.v4i16.v8i8", (i8x8) -> i16x4),
|
|
|
|
|
"paddlq_s8" => p!("vpaddls.v8i16.v16i8", (i8x16) -> i16x8),
|
|
|
|
|
"paddl_s16" => p!("vpaddls.v2i32.v4i16", (i16x4) -> i32x2),
|
|
|
|
|
"paddlq_s16" => p!("vpaddls.v4i32.v8i16", (i16x8) -> i32x4),
|
|
|
|
|
"paddl_s32" => p!("vpaddls.v1i64.v2i32", (i32x2) -> i64x1),
|
|
|
|
|
"paddlq_s32" => p!("vpaddls.v2i64.v4i32", (i32x4) -> i64x2),
|
|
|
|
|
"paddl_u8" => p!("vpaddlu.v4i16.v8i8", (i8x8) -> i16x4),
|
|
|
|
|
"paddlq_u8" => p!("vpaddlu.v8i16.v16i8", (i8x16) -> i16x8),
|
|
|
|
|
"paddl_u16" => p!("vpaddlu.v2i32.v4i16", (i16x4) -> i32x2),
|
|
|
|
|
"paddlq_u16" => p!("vpaddlu.v4i32.v8i16", (i16x8) -> i32x4),
|
|
|
|
|
"paddl_u32" => p!("vpaddlu.v1i64.v2i32", (i32x2) -> i64x1),
|
|
|
|
|
"paddlq_u32" => p!("vpaddlu.v2i64.v4i32", (i32x4) -> i64x2),
|
|
|
|
|
"padal_s8" => p!("vpadals.v4i16.v8i8", (i16x4, i8x8) -> i16x4),
|
|
|
|
|
"padalq_s8" => p!("vpadals.v8i16.v16i8", (i16x8, i8x16) -> i16x8),
|
|
|
|
|
"padal_s16" => p!("vpadals.v2i32.v4i16", (i32x2, i16x4) -> i32x2),
|
|
|
|
|
"padalq_s16" => p!("vpadals.v4i32.v8i16", (i32x4, i16x8) -> i32x4),
|
|
|
|
|
"padal_s32" => p!("vpadals.v1i64.v2i32", (i64x1, i32x2) -> i64x1),
|
|
|
|
|
"padalq_s32" => p!("vpadals.v2i64.v4i32", (i64x2, i32x4) -> i64x2),
|
|
|
|
|
"padal_u8" => p!("vpadalu.v4i16.v8i8", (i16x4, i8x8) -> i16x4),
|
|
|
|
|
"padalq_u8" => p!("vpadalu.v8i16.v16i8", (i16x8, i8x16) -> i16x8),
|
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"padal_u16" => p!("vpadalu.v2i32.v4i16", (i32x2, i16x4) -> i32x2),
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"padalq_u16" => p!("vpadalu.v4i32.v8i16", (i32x4, i16x8) -> i32x4),
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"padal_u32" => p!("vpadalu.v1i64.v2i32", (i64x1, i32x2) -> i64x1),
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"padalq_u32" => p!("vpadalu.v2i64.v4i32", (i64x2, i32x4) -> i64x2),
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2015-08-11 11:55:16 -05:00
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"pmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
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"pmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
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"pmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
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"pmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4),
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"pmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2),
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"pmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8),
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"pmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4),
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"pmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2),
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"pmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8),
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"pmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
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"pmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
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"pmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
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2015-08-11 19:44:18 -05:00
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"tbl1_s8" => p!("vtbl1", (i8x8, i8x8) -> i8x8),
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"tbl1_u8" => p!("vtbl1", (i8x8, i8x8) -> i8x8),
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// these aren't exactly the C intrinsics (they take one argument)
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"tbl2_s8" => p!("vtbl2", (i8x8, i8x8, i8x8) -> i8x8),
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"tbl2_u8" => p!("vtbl2", (i8x8, i8x8, i8x8) -> i8x8),
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"tbl3_s8" => p!("vtbl3", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbl3_u8" => p!("vtbl3", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbl4_s8" => p!("vtbl4", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbl4_u8" => p!("vtbl4", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx1_s8" => p!("vtbx1", (i8x8, i8x8, i8x8) -> i8x8),
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"tbx1_u8" => p!("vtbx1", (i8x8, i8x8, i8x8) -> i8x8),
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"tbx2_s8" => p!("vtbx2", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx2_u8" => p!("vtbx2", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx3_s8" => p!("vtbx3", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx3_u8" => p!("vtbx3", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx4_s8" => p!("vtbx4", (i8x8, i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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"tbx4_u8" => p!("vtbx4", (i8x8, i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
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2015-07-16 18:46:36 -05:00
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_ => return None,
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})
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}
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