2023-02-24 15:33:22 -06:00
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- // MIR for `unchecked_shl_unsigned_smaller` before Inline
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+ // MIR for `unchecked_shl_unsigned_smaller` after Inline
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fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 {
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2023-06-06 08:47:00 -05:00
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debug a => _1;
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debug b => _2;
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let mut _0: u16;
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let mut _3: u16;
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let mut _4: u32;
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2023-06-16 17:21:34 -05:00
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+ scope 1 (inlined core::num::<impl u16>::unchecked_shl) {
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+ debug self => _3;
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+ debug rhs => _4;
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+ let mut _5: u16;
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+ let mut _6: bool;
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+ scope 2 {
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+ }
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+ }
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2023-02-24 15:33:22 -06:00
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bb0: {
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2023-06-06 08:47:00 -05:00
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StorageLive(_3);
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_3 = _1;
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StorageLive(_4);
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_4 = _2;
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2023-06-23 11:53:09 -05:00
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- _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind continue];
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2023-06-03 02:41:50 -05:00
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- }
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-
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- bb1: {
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2023-06-16 17:21:34 -05:00
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+ StorageLive(_5);
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+ StorageLive(_6);
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2023-02-07 13:24:21 -06:00
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+ _6 = Le(_4, const 65535_u32);
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2023-06-16 17:21:34 -05:00
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+ assume(move _6);
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+ StorageDead(_6);
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+ _5 = _4 as u16 (IntToInt);
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2023-06-03 02:41:50 -05:00
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+ _0 = ShlUnchecked(_3, move _5);
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2023-06-16 17:21:34 -05:00
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+ StorageDead(_5);
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2023-06-06 08:47:00 -05:00
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StorageDead(_4);
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StorageDead(_3);
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return;
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2023-02-24 15:33:22 -06:00
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}
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}
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