2019-02-18 03:58:58 +09:00
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use crate::builder::Builder;
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use crate::type_::Type;
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use crate::type_of::LayoutLlvmExt;
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use crate::value::Value;
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2019-12-22 17:42:04 -05:00
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use rustc_codegen_ssa::mir::operand::OperandRef;
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2020-06-30 09:57:59 +01:00
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use rustc_codegen_ssa::{
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common::IntPredicate,
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traits::{BaseTypeMethods, BuilderMethods, ConstMethods, DerivedTypeMethods},
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2019-12-22 17:42:04 -05:00
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};
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2021-08-30 17:38:27 +03:00
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use rustc_middle::ty::layout::{HasTyCtxt, LayoutOf};
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2020-03-29 17:19:48 +02:00
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use rustc_middle::ty::Ty;
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2021-08-30 17:38:27 +03:00
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use rustc_target::abi::{Align, Endian, HasDataLayout, Size};
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2018-10-23 23:13:33 +00:00
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2021-12-14 13:49:49 -05:00
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fn round_pointer_up_to_alignment<'ll>(
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bx: &mut Builder<'_, 'll, '_>,
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2018-10-23 23:13:33 +00:00
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addr: &'ll Value,
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align: Align,
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2019-12-22 17:42:04 -05:00
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ptr_ty: &'ll Type,
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2018-10-23 23:13:33 +00:00
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) -> &'ll Value {
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let mut ptr_as_int = bx.ptrtoint(addr, bx.cx().type_isize());
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ptr_as_int = bx.add(ptr_as_int, bx.cx().const_i32(align.bytes() as i32 - 1));
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ptr_as_int = bx.and(ptr_as_int, bx.cx().const_i32(-(align.bytes() as i32)));
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bx.inttoptr(ptr_as_int, ptr_ty)
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}
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2021-12-14 13:49:49 -05:00
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fn emit_direct_ptr_va_arg<'ll, 'tcx>(
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bx: &mut Builder<'_, 'll, 'tcx>,
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2018-10-23 23:13:33 +00:00
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list: OperandRef<'tcx, &'ll Value>,
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llty: &'ll Type,
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size: Size,
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align: Align,
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slot_size: Align,
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2019-12-22 17:42:04 -05:00
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allow_higher_align: bool,
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2018-10-23 23:13:33 +00:00
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) -> (&'ll Value, Align) {
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2021-07-04 18:53:04 +02:00
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let va_list_ty = bx.type_i8p();
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let va_list_ptr_ty = bx.type_ptr_to(va_list_ty);
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2018-10-23 23:13:33 +00:00
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let va_list_addr = if list.layout.llvm_type(bx.cx) != va_list_ptr_ty {
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bx.bitcast(list.immediate(), va_list_ptr_ty)
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} else {
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list.immediate()
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};
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2021-07-04 18:53:04 +02:00
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let ptr = bx.load(va_list_ty, va_list_addr, bx.tcx().data_layout.pointer_align.abi);
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2018-10-23 23:13:33 +00:00
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let (addr, addr_align) = if allow_higher_align && align > slot_size {
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(round_pointer_up_to_alignment(bx, ptr, align, bx.cx().type_i8p()), align)
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} else {
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(ptr, slot_size)
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};
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let aligned_size = size.align_to(slot_size).bytes() as i32;
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let full_direct_size = bx.cx().const_i32(aligned_size);
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2021-08-01 00:00:00 +00:00
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let next = bx.inbounds_gep(bx.type_i8(), addr, &[full_direct_size]);
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2018-10-23 23:13:33 +00:00
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bx.store(next, va_list_addr, bx.tcx().data_layout.pointer_align.abi);
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2021-01-05 01:01:29 +00:00
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if size.bytes() < slot_size.bytes() && bx.tcx().sess.target.endian == Endian::Big {
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2018-10-23 23:13:33 +00:00
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let adjusted_size = bx.cx().const_i32((slot_size.bytes() - size.bytes()) as i32);
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2021-08-01 00:00:00 +00:00
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let adjusted = bx.inbounds_gep(bx.type_i8(), addr, &[adjusted_size]);
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2018-10-23 23:13:33 +00:00
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(bx.bitcast(adjusted, bx.cx().type_ptr_to(llty)), addr_align)
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} else {
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(bx.bitcast(addr, bx.cx().type_ptr_to(llty)), addr_align)
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}
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}
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2021-12-14 13:49:49 -05:00
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fn emit_ptr_va_arg<'ll, 'tcx>(
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bx: &mut Builder<'_, 'll, 'tcx>,
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2018-10-23 23:13:33 +00:00
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list: OperandRef<'tcx, &'ll Value>,
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target_ty: Ty<'tcx>,
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indirect: bool,
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slot_size: Align,
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2019-12-22 17:42:04 -05:00
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allow_higher_align: bool,
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2018-10-23 23:13:33 +00:00
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) -> &'ll Value {
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let layout = bx.cx.layout_of(target_ty);
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let (llty, size, align) = if indirect {
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2019-12-22 17:42:04 -05:00
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(
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bx.cx.layout_of(bx.cx.tcx.mk_imm_ptr(target_ty)).llvm_type(bx.cx),
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bx.cx.data_layout().pointer_size,
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bx.cx.data_layout().pointer_align,
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)
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2018-10-23 23:13:33 +00:00
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} else {
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2019-12-22 17:42:04 -05:00
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(layout.llvm_type(bx.cx), layout.size, layout.align)
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2018-10-23 23:13:33 +00:00
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};
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2019-12-22 17:42:04 -05:00
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let (addr, addr_align) =
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emit_direct_ptr_va_arg(bx, list, llty, size, align.abi, slot_size, allow_higher_align);
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2018-10-23 23:13:33 +00:00
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if indirect {
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2021-07-04 18:53:04 +02:00
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let tmp_ret = bx.load(llty, addr, addr_align);
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bx.load(bx.cx.layout_of(target_ty).llvm_type(bx.cx), tmp_ret, align.abi)
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2018-10-23 23:13:33 +00:00
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} else {
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2021-07-04 18:53:04 +02:00
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bx.load(llty, addr, addr_align)
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2018-10-23 23:13:33 +00:00
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}
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}
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2021-12-14 13:49:49 -05:00
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fn emit_aapcs_va_arg<'ll, 'tcx>(
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bx: &mut Builder<'_, 'll, 'tcx>,
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2020-06-30 09:57:59 +01:00
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list: OperandRef<'tcx, &'ll Value>,
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target_ty: Ty<'tcx>,
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) -> &'ll Value {
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// Implementation of the AAPCS64 calling convention for va_args see
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// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst
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let va_list_addr = list.immediate();
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2021-08-05 22:40:32 +00:00
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let va_list_layout = list.deref(bx.cx).layout;
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let va_list_ty = va_list_layout.llvm_type(bx);
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2020-06-30 09:57:59 +01:00
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let layout = bx.cx.layout_of(target_ty);
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2022-02-18 15:10:56 +01:00
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let maybe_reg = bx.append_sibling_block("va_arg.maybe_reg");
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let in_reg = bx.append_sibling_block("va_arg.in_reg");
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let on_stack = bx.append_sibling_block("va_arg.on_stack");
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let end = bx.append_sibling_block("va_arg.end");
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2020-06-30 09:57:59 +01:00
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let zero = bx.const_i32(0);
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let offset_align = Align::from_bytes(4).unwrap();
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let gr_type = target_ty.is_any_ptr() || target_ty.is_integral();
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let (reg_off, reg_top_index, slot_size) = if gr_type {
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2021-08-05 22:40:32 +00:00
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let gr_offs =
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bx.struct_gep(va_list_ty, va_list_addr, va_list_layout.llvm_field_index(bx.cx, 3));
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2020-06-30 09:57:59 +01:00
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let nreg = (layout.size.bytes() + 7) / 8;
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2021-08-05 22:40:32 +00:00
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(gr_offs, va_list_layout.llvm_field_index(bx.cx, 1), nreg * 8)
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2020-06-30 09:57:59 +01:00
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} else {
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2021-08-05 22:40:32 +00:00
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let vr_off =
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bx.struct_gep(va_list_ty, va_list_addr, va_list_layout.llvm_field_index(bx.cx, 4));
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2020-06-30 09:57:59 +01:00
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let nreg = (layout.size.bytes() + 15) / 16;
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2021-08-05 22:40:32 +00:00
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(vr_off, va_list_layout.llvm_field_index(bx.cx, 2), nreg * 16)
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2020-06-30 09:57:59 +01:00
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};
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// if the offset >= 0 then the value will be on the stack
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2021-07-04 18:53:04 +02:00
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let mut reg_off_v = bx.load(bx.type_i32(), reg_off, offset_align);
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2020-06-30 09:57:59 +01:00
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let use_stack = bx.icmp(IntPredicate::IntSGE, reg_off_v, zero);
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2022-02-18 15:10:56 +01:00
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bx.cond_br(use_stack, on_stack, maybe_reg);
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2020-06-30 09:57:59 +01:00
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// The value at this point might be in a register, but there is a chance that
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// it could be on the stack so we have to update the offset and then check
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// the offset again.
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2022-02-18 15:37:31 +01:00
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bx.switch_to_block(maybe_reg);
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2020-07-21 13:46:22 +01:00
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if gr_type && layout.align.abi.bytes() > 8 {
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2022-02-18 15:37:31 +01:00
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reg_off_v = bx.add(reg_off_v, bx.const_i32(15));
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reg_off_v = bx.and(reg_off_v, bx.const_i32(-16));
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2020-06-30 09:57:59 +01:00
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}
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2022-02-18 15:37:31 +01:00
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let new_reg_off_v = bx.add(reg_off_v, bx.const_i32(slot_size as i32));
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2020-06-30 09:57:59 +01:00
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2022-02-18 15:37:31 +01:00
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bx.store(new_reg_off_v, reg_off, offset_align);
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2020-06-30 09:57:59 +01:00
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// Check to see if we have overflowed the registers as a result of this.
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// If we have then we need to use the stack for this value
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2022-02-18 15:37:31 +01:00
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let use_stack = bx.icmp(IntPredicate::IntSGT, new_reg_off_v, zero);
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bx.cond_br(use_stack, on_stack, in_reg);
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2020-06-30 09:57:59 +01:00
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2022-02-18 15:37:31 +01:00
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bx.switch_to_block(in_reg);
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2021-07-04 18:53:04 +02:00
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let top_type = bx.type_i8p();
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2022-02-18 15:37:31 +01:00
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let top = bx.struct_gep(va_list_ty, va_list_addr, reg_top_index);
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let top = bx.load(top_type, top, bx.tcx().data_layout.pointer_align.abi);
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2020-06-30 09:57:59 +01:00
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// reg_value = *(@top + reg_off_v);
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2022-02-18 15:37:31 +01:00
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let mut reg_addr = bx.gep(bx.type_i8(), top, &[reg_off_v]);
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2021-01-20 17:06:29 +00:00
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if bx.tcx().sess.target.endian == Endian::Big && layout.size.bytes() != slot_size {
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// On big-endian systems the value is right-aligned in its slot.
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let offset = bx.const_i32((slot_size - layout.size.bytes()) as i32);
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2022-02-18 15:37:31 +01:00
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reg_addr = bx.gep(bx.type_i8(), reg_addr, &[offset]);
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2021-01-20 17:06:29 +00:00
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}
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2021-07-04 18:53:04 +02:00
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let reg_type = layout.llvm_type(bx);
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2022-02-18 15:37:31 +01:00
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let reg_addr = bx.bitcast(reg_addr, bx.cx.type_ptr_to(reg_type));
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let reg_value = bx.load(reg_type, reg_addr, layout.align.abi);
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bx.br(end);
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2020-06-30 09:57:59 +01:00
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// On Stack block
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2022-02-18 15:37:31 +01:00
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bx.switch_to_block(on_stack);
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2020-06-30 09:57:59 +01:00
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let stack_value =
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2022-02-18 15:37:31 +01:00
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emit_ptr_va_arg(bx, list, target_ty, false, Align::from_bytes(8).unwrap(), true);
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bx.br(end);
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2020-06-30 09:57:59 +01:00
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2022-02-18 15:37:31 +01:00
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bx.switch_to_block(end);
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let val =
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bx.phi(layout.immediate_llvm_type(bx), &[reg_value, stack_value], &[in_reg, on_stack]);
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2020-06-30 09:57:59 +01:00
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val
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}
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2022-12-06 17:36:09 +01:00
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fn emit_s390x_va_arg<'ll, 'tcx>(
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bx: &mut Builder<'_, 'll, 'tcx>,
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list: OperandRef<'tcx, &'ll Value>,
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target_ty: Ty<'tcx>,
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) -> &'ll Value {
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// Implementation of the s390x ELF ABI calling convention for va_args see
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// https://github.com/IBM/s390x-abi (chapter 1.2.4)
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let va_list_addr = list.immediate();
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let va_list_layout = list.deref(bx.cx).layout;
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let va_list_ty = va_list_layout.llvm_type(bx);
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let layout = bx.cx.layout_of(target_ty);
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let in_reg = bx.append_sibling_block("va_arg.in_reg");
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let in_mem = bx.append_sibling_block("va_arg.in_mem");
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let end = bx.append_sibling_block("va_arg.end");
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// FIXME: vector ABI not yet supported.
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let target_ty_size = bx.cx.size_of(target_ty).bytes();
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let indirect: bool = target_ty_size > 8 || !target_ty_size.is_power_of_two();
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let unpadded_size = if indirect { 8 } else { target_ty_size };
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let padded_size = 8;
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let padding = padded_size - unpadded_size;
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let gpr_type = indirect || !layout.is_single_fp_element(bx.cx);
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let (max_regs, reg_count_field, reg_save_index, reg_padding) =
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if gpr_type { (5, 0, 2, padding) } else { (4, 1, 16, 0) };
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// Check whether the value was passed in a register or in memory.
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let reg_count = bx.struct_gep(
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va_list_ty,
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va_list_addr,
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va_list_layout.llvm_field_index(bx.cx, reg_count_field),
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);
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let reg_count_v = bx.load(bx.type_i64(), reg_count, Align::from_bytes(8).unwrap());
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let use_regs = bx.icmp(IntPredicate::IntULT, reg_count_v, bx.const_u64(max_regs));
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bx.cond_br(use_regs, in_reg, in_mem);
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// Emit code to load the value if it was passed in a register.
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bx.switch_to_block(in_reg);
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// Work out the address of the value in the register save area.
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let reg_ptr =
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bx.struct_gep(va_list_ty, va_list_addr, va_list_layout.llvm_field_index(bx.cx, 3));
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let reg_ptr_v = bx.load(bx.type_i8p(), reg_ptr, bx.tcx().data_layout.pointer_align.abi);
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let scaled_reg_count = bx.mul(reg_count_v, bx.const_u64(8));
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let reg_off = bx.add(scaled_reg_count, bx.const_u64(reg_save_index * 8 + reg_padding));
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let reg_addr = bx.gep(bx.type_i8(), reg_ptr_v, &[reg_off]);
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// Update the register count.
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let new_reg_count_v = bx.add(reg_count_v, bx.const_u64(1));
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bx.store(new_reg_count_v, reg_count, Align::from_bytes(8).unwrap());
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bx.br(end);
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// Emit code to load the value if it was passed in memory.
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bx.switch_to_block(in_mem);
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// Work out the address of the value in the argument overflow area.
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let arg_ptr =
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bx.struct_gep(va_list_ty, va_list_addr, va_list_layout.llvm_field_index(bx.cx, 2));
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let arg_ptr_v = bx.load(bx.type_i8p(), arg_ptr, bx.tcx().data_layout.pointer_align.abi);
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let arg_off = bx.const_u64(padding);
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let mem_addr = bx.gep(bx.type_i8(), arg_ptr_v, &[arg_off]);
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// Update the argument overflow area pointer.
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let arg_size = bx.cx().const_u64(padded_size);
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|
|
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let new_arg_ptr_v = bx.inbounds_gep(bx.type_i8(), arg_ptr_v, &[arg_size]);
|
|
|
|
bx.store(new_arg_ptr_v, arg_ptr, bx.tcx().data_layout.pointer_align.abi);
|
|
|
|
bx.br(end);
|
|
|
|
|
|
|
|
// Return the appropriate result.
|
|
|
|
bx.switch_to_block(end);
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|
|
|
let val_addr = bx.phi(bx.type_i8p(), &[reg_addr, mem_addr], &[in_reg, in_mem]);
|
|
|
|
let val_type = layout.llvm_type(bx);
|
|
|
|
let val_addr = if indirect {
|
|
|
|
let ptr_type = bx.cx.type_ptr_to(val_type);
|
|
|
|
let ptr_addr = bx.bitcast(val_addr, bx.cx.type_ptr_to(ptr_type));
|
|
|
|
bx.load(ptr_type, ptr_addr, bx.tcx().data_layout.pointer_align.abi)
|
|
|
|
} else {
|
|
|
|
bx.bitcast(val_addr, bx.cx.type_ptr_to(val_type))
|
|
|
|
};
|
|
|
|
bx.load(val_type, val_addr, layout.align.abi)
|
|
|
|
}
|
|
|
|
|
2021-12-14 13:49:49 -05:00
|
|
|
pub(super) fn emit_va_arg<'ll, 'tcx>(
|
|
|
|
bx: &mut Builder<'_, 'll, 'tcx>,
|
2018-10-23 23:13:33 +00:00
|
|
|
addr: OperandRef<'tcx, &'ll Value>,
|
|
|
|
target_ty: Ty<'tcx>,
|
|
|
|
) -> &'ll Value {
|
|
|
|
// Determine the va_arg implementation to use. The LLVM va_arg instruction
|
|
|
|
// is lacking in some instances, so we should only use it as a fallback.
|
2020-10-15 11:44:00 +02:00
|
|
|
let target = &bx.cx.tcx.sess.target;
|
|
|
|
let arch = &bx.cx.tcx.sess.target.arch;
|
2020-10-24 09:44:57 -04:00
|
|
|
match &**arch {
|
2018-12-05 02:44:08 +00:00
|
|
|
// Windows x86
|
2020-11-08 14:27:51 +03:00
|
|
|
"x86" if target.is_like_windows => {
|
2019-12-22 17:42:04 -05:00
|
|
|
emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(4).unwrap(), false)
|
2018-10-23 23:13:33 +00:00
|
|
|
}
|
2018-12-05 02:44:08 +00:00
|
|
|
// Generic x86
|
2020-10-24 09:44:57 -04:00
|
|
|
"x86" => emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(4).unwrap(), true),
|
2019-01-20 11:47:29 +00:00
|
|
|
// Windows AArch64
|
2020-11-08 14:27:51 +03:00
|
|
|
"aarch64" if target.is_like_windows => {
|
2019-12-22 17:42:04 -05:00
|
|
|
emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(8).unwrap(), false)
|
2018-12-05 02:44:08 +00:00
|
|
|
}
|
2020-10-19 21:48:58 -04:00
|
|
|
// macOS / iOS AArch64
|
2020-11-08 14:27:51 +03:00
|
|
|
"aarch64" if target.is_like_osx => {
|
2019-12-22 17:42:04 -05:00
|
|
|
emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(8).unwrap(), true)
|
2018-12-05 02:44:08 +00:00
|
|
|
}
|
2020-10-24 09:44:57 -04:00
|
|
|
"aarch64" => emit_aapcs_va_arg(bx, addr, target_ty),
|
2022-12-06 17:36:09 +01:00
|
|
|
"s390x" => emit_s390x_va_arg(bx, addr, target_ty),
|
2018-12-05 02:44:08 +00:00
|
|
|
// Windows x86_64
|
2020-11-08 14:27:51 +03:00
|
|
|
"x86_64" if target.is_like_windows => {
|
2018-10-23 23:13:33 +00:00
|
|
|
let target_ty_size = bx.cx.size_of(target_ty).bytes();
|
2020-03-03 02:07:15 +01:00
|
|
|
let indirect: bool = target_ty_size > 8 || !target_ty_size.is_power_of_two();
|
2019-12-22 17:42:04 -05:00
|
|
|
emit_ptr_va_arg(bx, addr, target_ty, indirect, Align::from_bytes(8).unwrap(), false)
|
2018-10-23 23:13:33 +00:00
|
|
|
}
|
2018-12-05 02:44:08 +00:00
|
|
|
// For all other architecture/OS combinations fall back to using
|
|
|
|
// the LLVM va_arg instruction.
|
|
|
|
// https://llvm.org/docs/LangRef.html#va-arg-instruction
|
2019-12-22 17:42:04 -05:00
|
|
|
_ => bx.va_arg(addr.immediate(), bx.cx.layout_of(target_ty).llvm_type(bx.cx)),
|
2018-10-23 23:13:33 +00:00
|
|
|
}
|
|
|
|
}
|