2018-08-30 07:18:55 -05:00
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//@ run-pass
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2016-09-15 12:02:10 -05:00
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// Issue #34427: On ARM, the code in `foo` at one time was generating
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// a machine code instruction of the form: `str r0, [r0, rN]!` (for
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// some N), which is not legal because the source register and base
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// register cannot be identical in the preindexed form signalled by
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// the `!`.
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//
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// See LLVM bug: https://llvm.org/bugs/show_bug.cgi?id=28809
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#[inline(never)]
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fn foo(n: usize) -> Vec<Option<(*mut (), &'static ())>> {
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(0..n).map(|_| None).collect()
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}
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fn main() {
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let _ = (foo(10), foo(32));
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}
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