2017-04-30 13:33:25 -05:00
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// Copyright 2017 The Rust Project Developers. See the COPYRIGHT
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// file at the top-level directory of this distribution and at
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// http://rust-lang.org/COPYRIGHT.
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//
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// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
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// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
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// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
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// option. This file may not be copied, modified, or distributed
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// except according to those terms.
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use syntax_pos::symbol::Symbol;
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use back::write::create_target_machine;
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use llvm;
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use rustc::session::Session;
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use rustc::session::config::PrintRequest;
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2018-01-05 15:26:26 -06:00
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use libc::c_int;
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2018-02-10 18:27:04 -06:00
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use std::ffi::CString;
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2017-04-30 13:33:25 -05:00
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2017-05-14 13:33:37 -05:00
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::Once;
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2017-10-30 12:42:21 -05:00
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static POISONED: AtomicBool = AtomicBool::new(false);
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static INIT: Once = Once::new();
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pub(crate) fn init(sess: &Session) {
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2017-04-30 13:33:25 -05:00
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unsafe {
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// Before we touch LLVM, make sure that multithreading is enabled.
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INIT.call_once(|| {
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if llvm::LLVMStartMultithreaded() != 1 {
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// use an extra bool to make sure that all future usage of LLVM
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// cannot proceed despite the Once not running more than once.
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2017-05-14 13:33:37 -05:00
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POISONED.store(true, Ordering::SeqCst);
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2017-04-30 13:33:25 -05:00
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}
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configure_llvm(sess);
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});
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2017-05-14 13:33:37 -05:00
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if POISONED.load(Ordering::SeqCst) {
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2017-04-30 13:33:25 -05:00
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bug!("couldn't enable multi-threaded LLVM");
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}
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}
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}
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2017-10-30 12:42:21 -05:00
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fn require_inited() {
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INIT.call_once(|| bug!("llvm is not initialized"));
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if POISONED.load(Ordering::SeqCst) {
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bug!("couldn't enable multi-threaded LLVM");
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}
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}
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2017-04-30 13:33:25 -05:00
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unsafe fn configure_llvm(sess: &Session) {
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let mut llvm_c_strs = Vec::new();
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let mut llvm_args = Vec::new();
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{
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let mut add = |arg: &str| {
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let s = CString::new(arg).unwrap();
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llvm_args.push(s.as_ptr());
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llvm_c_strs.push(s);
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};
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add("rustc"); // fake program name
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if sess.time_llvm_passes() { add("-time-passes"); }
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if sess.print_llvm_passes() { add("-debug-pass=Structure"); }
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for arg in &sess.opts.cg.llvm_args {
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add(&(*arg));
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}
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}
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llvm::LLVMInitializePasses();
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llvm::initialize_available_targets();
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llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int,
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llvm_args.as_ptr());
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}
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2018-02-20 07:05:25 -06:00
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// WARNING: the features after aplpying `to_llvm_feature` must be known
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// to LLVM or the feature detection code will walk past the end of the feature
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// array, leading to crashes.
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2017-04-30 13:33:25 -05:00
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2018-02-10 17:27:21 -06:00
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const ARM_WHITELIST: &'static [&'static str] = &["neon", "v7", "vfp2", "vfp3", "vfp4"];
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const AARCH64_WHITELIST: &'static [&'static str] = &["neon", "v7"];
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2018-02-20 07:08:22 -06:00
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const X86_WHITELIST: &'static [&'static str] = &["aes", "avx", "avx2", "avx512bw",
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"avx512cd", "avx512dq", "avx512er",
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"avx512f", "avx512ifma", "avx512pf",
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"avx512vbmi", "avx512vl", "avx512vpopcntdq",
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"bmi", "bmi2", "fma", "fxsr",
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"lzcnt", "mmx", "pclmulqdq",
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"popcnt", "rdrand", "rdseed",
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"sse", "sse2", "sse3", "sse4.1",
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"sse4.2", "sse4a", "ssse3",
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"tbm", "xsave", "xsavec",
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"xsaveopt", "xsaves"];
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2018-02-10 17:27:21 -06:00
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const HEXAGON_WHITELIST: &'static [&'static str] = &["hvx", "hvx-double"];
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const POWERPC_WHITELIST: &'static [&'static str] = &["altivec",
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"power8-altivec", "power9-altivec",
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"power8-vector", "power9-vector",
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"vsx"];
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const MIPS_WHITELIST: &'static [&'static str] = &["msa"];
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pub fn to_llvm_feature(s: &str) -> &str {
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match s {
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"pclmulqdq" => "pclmul",
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"rdrand" => "rdrnd",
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2018-02-10 17:27:21 -06:00
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s => s,
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}
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}
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2017-11-28 03:28:15 -06:00
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2017-04-30 13:33:25 -05:00
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pub fn target_features(sess: &Session) -> Vec<Symbol> {
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let target_machine = create_target_machine(sess);
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2018-02-10 17:36:22 -06:00
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target_feature_whitelist(sess)
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.iter()
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.filter(|feature| {
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let llvm_feature = to_llvm_feature(feature);
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2018-02-11 06:57:07 -06:00
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let cstr = CString::new(llvm_feature).unwrap();
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unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
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})
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2018-02-10 18:27:04 -06:00
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.map(|feature| Symbol::intern(feature)).collect()
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}
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2017-04-30 13:33:25 -05:00
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2018-02-10 17:27:21 -06:00
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pub fn target_feature_whitelist(sess: &Session) -> &'static [&'static str] {
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2018-02-10 18:27:04 -06:00
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match &*sess.target.target.arch {
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"arm" => ARM_WHITELIST,
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"aarch64" => AARCH64_WHITELIST,
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"x86" | "x86_64" => X86_WHITELIST,
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"hexagon" => HEXAGON_WHITELIST,
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2017-11-28 03:28:15 -06:00
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"mips" | "mips64" => MIPS_WHITELIST,
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2017-07-22 19:16:43 -05:00
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"powerpc" | "powerpc64" => POWERPC_WHITELIST,
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_ => &[],
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}
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}
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pub fn print_version() {
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// Can be called without initializing LLVM
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2017-04-30 13:33:25 -05:00
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unsafe {
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println!("LLVM version: {}.{}",
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llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
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}
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}
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pub fn print_passes() {
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// Can be called without initializing LLVM
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2017-04-30 13:33:25 -05:00
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unsafe { llvm::LLVMRustPrintPasses(); }
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}
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2017-10-30 12:42:21 -05:00
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pub(crate) fn print(req: PrintRequest, sess: &Session) {
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require_inited();
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2017-04-30 13:33:25 -05:00
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let tm = create_target_machine(sess);
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unsafe {
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match req {
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PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
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PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
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_ => bug!("rustc_trans can't handle print request: {:?}", req),
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}
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}
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}
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