2018-09-13 14:58:19 +02:00
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use rustc::ty::layout::{HasTyCtxt, LayoutOf, TyLayout};
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use rustc::ty::Ty;
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2018-09-14 17:48:57 +02:00
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2018-10-23 17:01:35 +02:00
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use super::write::WriteBackendMethods;
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2018-09-27 15:31:20 +02:00
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use super::CodegenObject;
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2018-09-25 17:52:03 +02:00
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use rustc::middle::cstore::EncodedMetadata;
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2018-10-27 15:29:06 +03:00
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use rustc::session::{Session, config};
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2018-09-25 17:52:03 +02:00
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use rustc::ty::TyCtxt;
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2018-10-04 15:23:10 +02:00
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use rustc_codegen_utils::codegen_backend::CodegenBackend;
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2018-10-23 17:01:35 +02:00
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use std::sync::Arc;
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2019-09-25 13:14:43 -04:00
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use std::sync::mpsc;
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2019-10-09 16:47:38 +02:00
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use syntax::expand::allocator::AllocatorKind;
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2019-10-21 17:14:03 +11:00
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use syntax_pos::symbol::Symbol;
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2018-08-30 15:41:59 +02:00
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2018-09-13 14:58:19 +02:00
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pub trait BackendTypes {
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2018-09-14 17:48:57 +02:00
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type Value: CodegenObject;
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2019-10-13 11:28:19 +02:00
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type Function: CodegenObject;
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2019-08-27 11:45:03 +02:00
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2018-09-20 15:47:22 +02:00
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type BasicBlock: Copy;
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2018-09-14 17:48:57 +02:00
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type Type: CodegenObject;
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2018-11-13 12:51:42 +02:00
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type Funclet;
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2018-09-20 15:47:22 +02:00
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type DIScope: Copy;
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2018-08-28 11:40:34 +02:00
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}
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2018-09-13 14:58:19 +02:00
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pub trait Backend<'tcx>:
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2018-10-09 16:01:02 +02:00
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Sized + BackendTypes + HasTyCtxt<'tcx> + LayoutOf<Ty = Ty<'tcx>, TyLayout = TyLayout<'tcx>>
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2018-09-13 14:58:19 +02:00
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{
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}
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impl<'tcx, T> Backend<'tcx> for T where
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Self: BackendTypes + HasTyCtxt<'tcx> + LayoutOf<Ty = Ty<'tcx>, TyLayout = TyLayout<'tcx>>
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2018-11-24 16:15:26 +01:00
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{
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}
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2018-09-25 17:52:03 +02:00
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2018-10-23 17:01:35 +02:00
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pub trait ExtraBackendMethods: CodegenBackend + WriteBackendMethods + Sized + Send {
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2019-06-14 00:48:52 +03:00
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fn new_metadata(&self, sess: TyCtxt<'_>, mod_name: &str) -> Self::Module;
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fn write_compressed_metadata<'tcx>(
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2018-09-25 17:52:03 +02:00
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&self,
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2019-06-14 00:48:52 +03:00
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tcx: TyCtxt<'tcx>,
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2019-04-26 17:22:36 +10:00
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metadata: &EncodedMetadata,
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llvm_module: &mut Self::Module,
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);
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2019-06-14 00:48:52 +03:00
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fn codegen_allocator<'tcx>(
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2019-02-25 08:52:46 +01:00
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&self,
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2019-06-14 00:48:52 +03:00
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tcx: TyCtxt<'tcx>,
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2019-02-25 08:52:46 +01:00
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mods: &mut Self::Module,
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2019-06-12 00:11:55 +03:00
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kind: AllocatorKind,
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2019-05-29 01:21:27 +03:00
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);
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2019-09-25 13:14:43 -04:00
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fn compile_codegen_unit(
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&self,
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tcx: TyCtxt<'_>,
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2019-10-21 17:14:03 +11:00
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cgu_name: Symbol,
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2019-09-25 13:14:43 -04:00
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tx_to_llvm_workers: &mpsc::Sender<Box<dyn std::any::Any + Send>>,
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);
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2018-10-23 17:01:35 +02:00
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// If find_features is true this won't access `sess.crate_types` by assuming
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// that `is_pie_binary` is false. When we discover LLVM target features
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// `sess.crate_types` is uninitialized so we cannot access it.
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fn target_machine_factory(
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&self,
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sess: &Session,
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2018-10-27 15:29:06 +03:00
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opt_level: config::OptLevel,
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2018-10-23 17:01:35 +02:00
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find_features: bool,
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) -> Arc<dyn Fn() -> Result<Self::TargetMachine, String> + Send + Sync>;
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fn target_cpu<'b>(&self, sess: &'b Session) -> &'b str;
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2018-09-26 17:00:01 +02:00
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}
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