rust/tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.panic-abort.diff

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

145 lines
9.7 KiB
Diff
Raw Normal View History

2023-02-24 15:33:22 -06:00
- // MIR for `unchecked_shr_signed_smaller` before Inline
+ // MIR for `unchecked_shr_signed_smaller` after Inline
fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
debug a => _1; // in scope 0 at $DIR/unchecked_shifts.rs:+0:44: +0:45
debug b => _2; // in scope 0 at $DIR/unchecked_shifts.rs:+0:52: +0:53
let mut _0: i16; // return place in scope 0 at $DIR/unchecked_shifts.rs:+0:63: +0:66
let mut _3: i16; // in scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
let mut _4: u32; // in scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
2023-04-05 03:44:20 -05:00
+ scope 1 (inlined core::num::<impl i16>::unchecked_shr) { // at $DIR/unchecked_shifts.rs:17:7: 17:23
2023-02-24 15:33:22 -06:00
+ debug self => _3; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ debug rhs => _4; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
2023-04-17 03:22:16 -05:00
+ let mut _5: i16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-02-24 15:33:22 -06:00
+ scope 2 {
+ scope 3 (inlined core::num::<impl i16>::unchecked_shr::conv) { // at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug x => _4; // in scope 3 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ let mut _6: std::option::Option<i16>; // in scope 3 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ let mut _7: std::result::Result<i16, std::num::TryFromIntError>; // in scope 3 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ scope 4 {
+ scope 5 (inlined <u32 as TryInto<i16>>::try_into) { // at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug self => _4; // in scope 5 at $SRC_DIR/core/src/convert/mod.rs:LL:COL
+ scope 6 (inlined convert::num::<impl TryFrom<u32> for i16>::try_from) { // at $SRC_DIR/core/src/convert/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug u => _4; // in scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ let mut _8: bool; // in scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ let mut _9: u32; // in scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ let mut _10: i16; // in scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ }
+ }
+ scope 7 (inlined Result::<i16, TryFromIntError>::ok) { // at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug self => _7; // in scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ let mut _11: isize; // in scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ let _12: i16; // in scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ scope 8 {
2023-05-26 13:53:34 -05:00
+ debug x => _12; // in scope 8 at $SRC_DIR/core/src/result.rs:LL:COL
+ }
+ }
+ scope 9 (inlined #[track_caller] Option::<i16>::unwrap_unchecked) { // at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug self => _6; // in scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ let mut _13: &std::option::Option<i16>; // in scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ let mut _14: isize; // in scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ scope 10 {
+ debug val => _5; // in scope 10 at $SRC_DIR/core/src/option.rs:LL:COL
+ }
+ scope 11 {
+ scope 13 (inlined unreachable_unchecked) { // at $SRC_DIR/core/src/option.rs:LL:COL
+ scope 14 {
+ scope 15 (inlined unreachable_unchecked::runtime) { // at $SRC_DIR/core/src/intrinsics.rs:LL:COL
+ }
+ }
+ }
+ }
+ scope 12 (inlined Option::<i16>::is_some) { // at $SRC_DIR/core/src/option.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ debug self => _13; // in scope 12 at $SRC_DIR/core/src/option.rs:LL:COL
+ }
+ }
+ }
+ }
2023-02-24 15:33:22 -06:00
+ }
+ }
bb0: {
StorageLive(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
_3 = _1; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
StorageLive(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
_4 = _2; // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
- _0 = core::num::<impl i16>::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable]; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:23
- // mir::Constant
- // + span: $DIR/unchecked_shifts.rs:17:7: 17:20
- // + literal: Const { ty: unsafe fn(i16, u32) -> i16 {core::num::<impl i16>::unchecked_shr}, val: Value(<ZST>) }
2023-04-17 03:22:16 -05:00
+ StorageLive(_5); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
2023-05-26 13:53:34 -05:00
+ StorageLive(_6); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageLive(_7); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageLive(_8); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ StorageLive(_9); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ _9 = const 32767_u32; // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ _8 = Gt(_4, move _9); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ StorageDead(_9); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ switchInt(move _8) -> [0: bb3, otherwise: bb2]; // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
2023-02-24 15:33:22 -06:00
}
bb1: {
2023-04-29 21:02:45 -05:00
+ StorageDead(_5); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
StorageDead(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2
+ }
+
+ bb2: {
2023-05-26 13:53:34 -05:00
+ _7 = Result::<i16, TryFromIntError>::Err(const TryFromIntError(())); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ // mir::Constant
+ // + span: no-location
+ // + literal: Const { ty: TryFromIntError, val: Value(<ZST>) }
+ goto -> bb4; // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ }
+
+ bb3: {
2023-05-26 13:53:34 -05:00
+ StorageLive(_10); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ _10 = _4 as i16 (IntToInt); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ _7 = Result::<i16, TryFromIntError>::Ok(move _10); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ StorageDead(_10); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ goto -> bb4; // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ }
+
+ bb4: {
2023-05-26 13:53:34 -05:00
+ StorageDead(_8); // scope 6 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+ StorageLive(_12); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _11 = discriminant(_7); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ switchInt(move _11) -> [0: bb7, 1: bb5, otherwise: bb6]; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ }
+
+ bb5: {
2023-05-26 13:53:34 -05:00
+ _6 = Option::<i16>::None; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ goto -> bb8; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ }
+
+ bb6: {
+ unreachable; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ }
+
+ bb7: {
2023-05-26 13:53:34 -05:00
+ _12 = move ((_7 as Ok).0: i16); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ _6 = Option::<i16>::Some(move _12); // scope 8 at $SRC_DIR/core/src/result.rs:LL:COL
+ goto -> bb8; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL
+ }
+
+ bb8: {
2023-05-26 13:53:34 -05:00
+ StorageDead(_12); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageDead(_7); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageLive(_13); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _14 = discriminant(_6); // scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ switchInt(move _14) -> [1: bb9, otherwise: bb6]; // scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ }
+
+ bb9: {
2023-05-26 13:53:34 -05:00
+ _5 = move ((_6 as Some).0: i16); // scope 9 at $SRC_DIR/core/src/option.rs:LL:COL
+ StorageDead(_13); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageDead(_6); // scope 4 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _0 = unchecked_shr::<i16>(_3, move _5) -> [return: bb1, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ // mir::Constant
+ // + span: $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(i16, i16) -> i16 {unchecked_shr::<i16>}, val: Value(<ZST>) }
2023-02-24 15:33:22 -06:00
}
}