239 lines
12 KiB
Rust
239 lines
12 KiB
Rust
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// Copyright 2012-2014 The Rust Project Developers. See the COPYRIGHT
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// file at the top-level directory of this distribution and at
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// http://rust-lang.org/COPYRIGHT.
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//
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// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
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// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
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// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
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// option. This file may not be copied, modified, or distributed
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// except according to those terms.
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use back::abi;
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use llvm::ValueRef;
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use rustc::middle::ty::Ty;
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use rustc_front::hir;
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use rustc_mir::repr as mir;
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use trans::asm;
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use trans::base;
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use trans::build;
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use trans::common::{self, Block, Result};
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use trans::debuginfo::DebugLoc;
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use trans::declare;
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use trans::machine;
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use trans::type_::Type;
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use trans::type_of;
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use trans::tvec;
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use super::MirContext;
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use super::operand::OperandRef;
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impl<'bcx, 'tcx> MirContext<'bcx, 'tcx> {
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pub fn trans_rvalue(&mut self,
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bcx: Block<'bcx, 'tcx>,
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lldest: ValueRef,
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rvalue: &mir::Rvalue<'tcx>)
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-> Block<'bcx, 'tcx>
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{
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debug!("trans_rvalue(lldest={}, rvalue={:?})",
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bcx.val_to_string(lldest),
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rvalue);
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match *rvalue {
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mir::Rvalue::Use(ref operand) => {
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self.trans_operand_into(bcx, lldest, operand);
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bcx
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}
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mir::Rvalue::Cast(..) => {
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unimplemented!()
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}
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mir::Rvalue::Repeat(..) => {
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unimplemented!()
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}
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mir::Rvalue::Ref(_, _, ref lvalue) => {
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let tr_lvalue = self.trans_lvalue(bcx, lvalue);
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// Note: lvalues are indirect, so storing the `llval` into the
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// destination effectively creates a reference.
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build::Store(bcx, tr_lvalue.llval, lldest);
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bcx
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}
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mir::Rvalue::Len(ref lvalue) => {
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let tr_lvalue = self.trans_lvalue(bcx, lvalue);
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let (_, lllen) = tvec::get_base_and_len(bcx,
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tr_lvalue.llval,
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tr_lvalue.ty.to_ty(bcx.tcx()));
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build::Store(bcx, lllen, lldest);
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bcx
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}
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mir::Rvalue::BinaryOp(op, ref lhs, ref rhs) => {
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let lhs = self.trans_operand(bcx, lhs);
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let rhs = self.trans_operand(bcx, rhs);
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let is_float = lhs.ty.is_fp();
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let is_signed = lhs.ty.is_signed();
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let binop_debug_loc = DebugLoc::None;
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let llval = match op {
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mir::BinOp::Add => if is_float {
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build::FAdd(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else {
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build::Add(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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},
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mir::BinOp::Sub => if is_float {
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build::FSub(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else {
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build::Sub(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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},
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mir::BinOp::Mul => if is_float {
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build::FMul(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else {
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build::Mul(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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},
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mir::BinOp::Div => if is_float {
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build::FDiv(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else if is_signed {
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build::SDiv(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else {
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build::UDiv(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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},
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mir::BinOp::Rem => if is_float {
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// LLVM currently always lowers the `frem` instructions appropriate
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// library calls typically found in libm. Notably f64 gets wired up
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// to `fmod` and f32 gets wired up to `fmodf`. Inconveniently for
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// us, 32-bit MSVC does not actually have a `fmodf` symbol, it's
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// instead just an inline function in a header that goes up to a
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// f64, uses `fmod`, and then comes back down to a f32.
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//
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// Although LLVM knows that `fmodf` doesn't exist on MSVC, it will
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// still unconditionally lower frem instructions over 32-bit floats
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// to a call to `fmodf`. To work around this we special case MSVC
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// 32-bit float rem instructions and instead do the call out to
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// `fmod` ourselves.
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//
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// Note that this is currently duplicated with src/libcore/ops.rs
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// which does the same thing, and it would be nice to perhaps unify
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// these two implementations on day! Also note that we call `fmod`
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// for both 32 and 64-bit floats because if we emit any FRem
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// instruction at all then LLVM is capable of optimizing it into a
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// 32-bit FRem (which we're trying to avoid).
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let tcx = bcx.tcx();
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let use_fmod = tcx.sess.target.target.options.is_like_msvc &&
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tcx.sess.target.target.arch == "x86";
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if use_fmod {
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let f64t = Type::f64(bcx.ccx());
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let fty = Type::func(&[f64t, f64t], &f64t);
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let llfn = declare::declare_cfn(bcx.ccx(), "fmod", fty,
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tcx.types.f64);
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if lhs.ty == tcx.types.f32 {
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let lllhs = build::FPExt(bcx, lhs.llval, f64t);
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let llrhs = build::FPExt(bcx, rhs.llval, f64t);
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let llres = build::Call(bcx, llfn, &[lllhs, llrhs],
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None, binop_debug_loc);
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build::FPTrunc(bcx, llres, Type::f32(bcx.ccx()))
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} else {
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build::Call(bcx, llfn, &[lhs.llval, rhs.llval],
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None, binop_debug_loc)
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}
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} else {
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build::FRem(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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}
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} else if is_signed {
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build::SRem(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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} else {
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build::URem(bcx, lhs.llval, rhs.llval, binop_debug_loc)
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},
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mir::BinOp::BitOr => build::Or(bcx, lhs.llval, rhs.llval, binop_debug_loc),
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mir::BinOp::BitAnd => build::And(bcx, lhs.llval, rhs.llval, binop_debug_loc),
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mir::BinOp::BitXor => build::Xor(bcx, lhs.llval, rhs.llval, binop_debug_loc),
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mir::BinOp::Shl => common::build_unchecked_lshift(bcx,
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lhs.llval,
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rhs.llval,
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binop_debug_loc),
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mir::BinOp::Shr => common::build_unchecked_rshift(bcx,
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lhs.ty,
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lhs.llval,
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rhs.llval,
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binop_debug_loc),
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mir::BinOp::Eq => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiEq, binop_debug_loc),
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mir::BinOp::Lt => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiLt, binop_debug_loc),
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mir::BinOp::Le => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiLe, binop_debug_loc),
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mir::BinOp::Ne => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiNe, binop_debug_loc),
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mir::BinOp::Ge => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiGe, binop_debug_loc),
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mir::BinOp::Gt => base::compare_scalar_types(bcx, lhs.llval, rhs.llval, lhs.ty,
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hir::BiGt, binop_debug_loc),
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};
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build::Store(bcx, llval, lldest);
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bcx
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}
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mir::Rvalue::UnaryOp(op, ref operand) => {
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let operand = self.trans_operand(bcx, operand);
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let is_float = operand.ty.is_fp();
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let debug_loc = DebugLoc::None;
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let llval = match op {
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mir::UnOp::Not => build::Not(bcx, operand.llval, debug_loc),
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mir::UnOp::Neg => if is_float {
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build::FNeg(bcx, operand.llval, debug_loc)
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} else {
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build::Neg(bcx, operand.llval, debug_loc)
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}
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};
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build::Store(bcx, llval, lldest);
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bcx
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}
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mir::Rvalue::Box(content_ty) => {
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let content_ty: Ty<'tcx> = content_ty;
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let llty = type_of::type_of(bcx.ccx(), content_ty);
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let llsize = machine::llsize_of(bcx.ccx(), llty);
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let align = type_of::align_of(bcx.ccx(), content_ty);
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let llalign = common::C_uint(bcx.ccx(), align);
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let llty_ptr = llty.ptr_to();
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let box_ty = bcx.tcx().mk_box(content_ty);
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let Result { bcx, val: llval } = base::malloc_raw_dyn(bcx,
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llty_ptr,
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box_ty,
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llsize,
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llalign,
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DebugLoc::None);
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build::Store(bcx, llval, lldest);
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bcx
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}
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mir::Rvalue::Aggregate(_, ref operands) => {
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for (i, operand) in operands.iter().enumerate() {
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let lldest_i = build::GEPi(bcx, lldest, &[0, i]);
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self.trans_operand_into(bcx, lldest_i, operand);
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}
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bcx
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}
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mir::Rvalue::Slice { ref input, from_start, from_end } => {
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let ccx = bcx.ccx();
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let input = self.trans_lvalue(bcx, input);
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let (llbase, lllen) = tvec::get_base_and_len(bcx,
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input.llval,
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input.ty.to_ty(bcx.tcx()));
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let llbase1 = build::GEPi(bcx, llbase, &[from_start]);
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let adj = common::C_uint(ccx, from_start + from_end);
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let lllen1 = build::Sub(bcx, lllen, adj, DebugLoc::None);
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build::Store(bcx, llbase1, build::GEPi(bcx, lldest, &[0, abi::FAT_PTR_ADDR]));
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build::Store(bcx, lllen1, build::GEPi(bcx, lldest, &[0, abi::FAT_PTR_EXTRA]));
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bcx
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}
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mir::Rvalue::InlineAsm(inline_asm) => {
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asm::trans_inline_asm(bcx, inline_asm)
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}
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}
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}
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}
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