272 lines
7.3 KiB
Plaintext
272 lines
7.3 KiB
Plaintext
include syscall.i
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include term.i
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include string.i
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section .text,text
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public traps_init
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; Initialize trap handling
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traps_init:
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move.l #trap_table, a0
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movec a0, VBR
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rts
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generic_handler:
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; Read the format/vector word and isolate the interrupt vector
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move.w ($6,a7), d0
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andi.l #$FF, d0
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cmpi.l #$20, d0
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; Only the first 32 traps are named, print generic message for the rest
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bge.b unk_trap
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; Get the pointer to the trap name in a0
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lsl.w #2, d0
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move.l #trap_name_table, a0
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move.l (a0,d0), a0
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jsr term_print ; Print it
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; Print " Trap"
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move.l #trap_string, a0
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jsr term_print
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; Print where the PC was when the trap occured
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move.l ($2,a7), a0
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jsr print_pc
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; Halt
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stop #$2700
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unk_trap:
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; Print the unknown trap message
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move.l #unk_trap_msg, a0
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jsr term_print
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; Convert the trap number to a hex string
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move.w ($6,a7), d0
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andi.l #$FF, d0
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move.l #string_buffer, a0
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jsr hex_to_ascii
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; Print it
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move.l #string_buffer, a0
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jsr term_print
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; Print where the PC was when the trap occured
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move.l ($2,a7), a0
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jsr print_pc
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; Halt
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stop #$2700
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berr_handler:
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; Select the correct prefix based on whether the error was in supervisor or user mode
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move.w ($8,a7), d0
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andi.w #$4, d0
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cmpi.w #0, d0
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beq.b .1
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move.l #berr_supervisor_pfx, a0
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bra.b .2
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.1:
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move.l #berr_user_pfx, a0
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.2:
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jsr term_print ; Print the prefi
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; Print " bus error "
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move.l #berr_msg, a0
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jsr term_print
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; Get the error kind out of the special status word (end up with ins flag, word flag, and write flg in that order, shifted left by 2 and put in d0)
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move.l #0, d1
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move.w ($8,a7), d0
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andi.w #$100, d0
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cmpi.w #0, d0
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beq.b .3
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move.l #$4, d1
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.3:
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move.w ($8,a7), d0
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andi.w #$200, d0
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cmpi.w #0, d0
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beq.b .4
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ori.l #$8, d1
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.4:
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move.w ($8,a7), d0
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andi.w #$2000, d0
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cmpi.w #0, d0
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beq.b .5
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ori.l #$10, d1
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.5:
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; Get the pointer to the correct message for this kind of bus error in a0
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move.l #berr_table, a0
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adda.l d1, a0
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move.l (a0), a0
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jsr term_print ; Print it
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; Convert the triggering address to a hex string
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move.l ($a,a7), d0
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move.l #string_buffer, a0
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jsr hex_to_ascii
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; Print it
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move.l #string_buffer, a0
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jsr term_print
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; Print where the PC was when the trap occured
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move.l ($2,a7), a0
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jsr print_pc
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stop #$2700
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int_vector_handler:
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movem.l d0-d7/a0-a6,-(a7)
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lea.l (60,a7), a6
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; Print "Interrupt Vector "
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move.l #int_vector_msg, a0
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jsr term_print
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; Get the interrupt vector offset
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move.w ($6,a6), d0
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andi.l #$FF, d0
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subi.l #$40, d0
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; Convert it to a hex string
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move.l #string_buffer, a0
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jsr hex_to_ascii
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; Print it
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move.l #string_buffer, a0
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jsr term_println
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movem.l (a7)+, d0-d7/a0-a6
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rte
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user_trap_handler:
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movem.l d2-d7/a2-a6,-(a7)
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jsr handle_syscall
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movem.l (a7)+, d2-d7/a2-a6
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rte
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; Print " (PC: {a0})\n"
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; Clobbers d0, a0, a1, a2
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print_pc:
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; Print the message up to the first variable
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move.l a0, a2
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move.l #pc_string_start, a0
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jsr term_print
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; Convert the PC value to a hex string
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move.l a2, d0
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move.l #string_buffer, a0
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jsr hex_to_ascii
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; Print it
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move.l #string_buffer, a0
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jsr term_print
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; Print the rest of the message
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move.l #pc_string_end, a0
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jsr term_println
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rts
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section .bss,bss
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string_buffer:
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ds.b 11
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section .data,data
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unk_trap_msg: dc.b "Unknown trap ",0
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trap_string: dc.b " Trap",0
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berr_msg: dc.b "bus error ",0
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pc_string_start: dc.b " (PC: ",0
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pc_string_end: dc.b ")",0
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int_vector_msg: dc.b "Interrupt Vector ",0
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user_trap_msg: dc.b "User Trap ",0
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berr_supervisor_pfx: dc.b "Supervsior ",0
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berr_user_pfx: dc.b "User ",0
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align 1
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berr_table:
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dc.l berr_rdw_msg
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dc.l berr_wdw_msg
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dc.l berr_rdb_msg
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dc.l berr_wdb_msg
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dc.l berr_riw_msg
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dc.l berr_wiw_msg
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dc.l berr_rib_msg
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dc.l berr_wib_msg
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berr_rdw_msg: dc.b "reading word from ",0
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berr_wdw_msg: dc.b "writing word to ",0
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berr_rdb_msg: dc.b "reading byte from ",0
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berr_wdb_msg: dc.b "writing byte to ",0
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berr_riw_msg: dc.b "reading instruction word from ",0
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berr_wiw_msg: dc.b "writing instruction word to ",0
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berr_rib_msg: dc.b "reading instruction byte from ",0
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berr_wib_msg: dc.b "writing instruction byte to ",0
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align 1
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trap_name_table:
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dc.l $0
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dc.l $0
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dc.l berr_msg
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dc.l address_trap_name
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dc.l ill_ins_trap_name
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dc.l zero_div_trap_name
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dc.l chk_ins_trap_name
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dc.l trapv_trap_name
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dc.l priv_viol_trap_name
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dc.l trace_trap_name
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dc.l line_1010_emu_trap_name
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dc.l line_1111_emu_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l format_error_trap_name
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dc.l uninit_int_vect_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l reserved_trap_name
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dc.l spur_interrupt_trap_name
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dc.l lev_1_autovec_trap_name
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dc.l lev_2_autovec_trap_name
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dc.l lev_3_autovec_trap_name
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dc.l lev_4_autovec_trap_name
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dc.l lev_5_autovec_trap_name
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dc.l lev_6_autovec_trap_name
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dc.l lev_7_autovec_trap_name
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address_trap_name: dc.b "Address Error",0
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ill_ins_trap_name: dc.b "Illegal Instruction",0
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zero_div_trap_name: dc.b "Zero Divide",0
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chk_ins_trap_name: dc.b "CHK Instruction",0
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trapv_trap_name: dc.b "TRAPV Instruction",0
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priv_viol_trap_name: dc.b "Privilege Violation",0
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trace_trap_name: dc.b "Trace",0
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line_1010_emu_trap_name: dc.b "Line 1010 Emulator",0
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line_1111_emu_trap_name: dc.b "Line 1111 Emulator",0
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reserved_trap_name: dc.b "Reserved",0
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format_error_trap_name: dc.b "Format Error",0
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uninit_int_vect_trap_name: dc.b "Uninitialized Interrupt Vector",0
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spur_interrupt_trap_name: dc.b "Spurious Interrupt",0
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lev_1_autovec_trap_name: dc.b "Level 1 Interrupt Autovector",0
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lev_2_autovec_trap_name: dc.b "Level 2 Interrupt Autovector",0
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lev_3_autovec_trap_name: dc.b "Level 3 Interrupt Autovector",0
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lev_4_autovec_trap_name: dc.b "Level 4 Interrupt Autovector",0
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lev_5_autovec_trap_name: dc.b "Level 5 Interrupt Autovector",0
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lev_6_autovec_trap_name: dc.b "Level 6 Interrupt Autovector",0
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lev_7_autovec_trap_name: dc.b "Level 7 Interrupt Autovector",0
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align 10
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trap_table:
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dc.l generic_handler ; Reset initial SSP, should never be called
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dc.l generic_handler ; Reset initial PC, should never be called
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dc.l berr_handler ; Bus Error
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dc.l generic_handler ; Address Error
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dc.l generic_handler ; Illegal Instruction
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dc.l generic_handler ; Zero Divide
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dc.l generic_handler ; CHK Instruction
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dc.l generic_handler ; TRAPV Instruction
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dc.l generic_handler ; Privilege Violation
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dc.l generic_handler ; Trace
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dc.l generic_handler ; Line 1010 Emulator
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dc.l generic_handler ; Line 1111 Emulator
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dc.l generic_handler ; Reserved
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dc.l generic_handler ; Reserved
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dc.l generic_handler ; Format Error
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dc.l generic_handler ; Uninitialized Interrupt Vector
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rept 8
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dc.l generic_handler ; Reserved
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endr
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dc.l generic_handler ; Spurious Interrupt
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dc.l generic_handler ; Level 1 Interrupt Autovector
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dc.l generic_handler ; Level 2 Interrupt Autovector
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dc.l generic_handler ; Level 3 Interrupt Autovector
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dc.l generic_handler ; Level 4 Interrupt Autovector
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dc.l generic_handler ; Level 5 Interrupt Autovector
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dc.l generic_handler ; Level 6 Interrupt Autovector
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dc.l generic_handler ; Level 7 Interrupt Autovector
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rept 16
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dc.l user_trap_handler
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endr
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rept 16
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dc.l generic_handler ; Reserved
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endr
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rept 192
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dc.l int_vector_handler
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endr
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