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2 Commits
b5409f3590
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9956962089
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9956962089 | |||
2c6894cc7c |
@ -1,5 +1,6 @@
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use std::fmt::Debug;
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use std::fmt::Debug;
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use std::fmt::Display;
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use std::fmt::Display;
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use std::marker::PhantomData;
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use anyhow::anyhow;
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use anyhow::anyhow;
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use itertools::Itertools;
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use itertools::Itertools;
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@ -14,23 +15,41 @@ use crate::{
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};
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};
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pub trait DMAHandler: Debug {
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pub trait DMAHandler: Debug {
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fn handle<'a>(&mut self, backplane: &'a Backplane, card_accessor: DMACardAccessor<'a>);
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fn handle<'a>(&mut self, backplane: &'a Backplane, card_accessor: DMACardAccessorBuilder<'a>);
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}
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}
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#[derive(Copy, Clone, Debug)]
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#[derive(Copy, Clone, Debug)]
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#[allow(dead_code)]
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#[allow(dead_code)]
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pub struct DMACardAccessor<'a> {
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pub struct DMACardAccessorBuilder<'a> {
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backplane: &'a Backplane,
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backplane: &'a Backplane,
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card_no: usize,
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card_no: usize,
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}
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}
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impl DMACardAccessor<'_> {
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impl<'a> DMACardAccessorBuilder<'a> {
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#[allow(dead_code)]
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#[allow(dead_code)]
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pub fn get<T: Card>(&self) -> Option<MappedMutexGuard<T>> {
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pub fn build<T: Card>(self) -> DMACardAccessor<'a, T> {
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MutexGuard::try_map(self.backplane.cards.lock(), |cards| {
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DMACardAccessor {
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cards[self.card_no].downcast_mut::<T>()
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backplane: self.backplane,
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card_no: self.card_no,
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card_type: PhantomData,
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}
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}
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}
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#[derive(Copy, Clone, Debug)]
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#[allow(dead_code)]
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pub struct DMACardAccessor<'a, T> {
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backplane: &'a Backplane,
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card_no: usize,
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card_type: PhantomData<T>,
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}
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impl<T: Card> DMACardAccessor<'_, T> {
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#[allow(dead_code)]
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pub fn get(&self) -> MappedMutexGuard<T> {
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MutexGuard::map(self.backplane.cards.lock(), |cards| {
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cards[self.card_no].downcast_mut::<T>().unwrap()
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})
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})
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.ok()
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}
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}
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}
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}
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@ -176,7 +195,7 @@ impl Backplane {
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for handler in self.dma_handlers.lock().iter_mut() {
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for handler in self.dma_handlers.lock().iter_mut() {
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handler.1.handle(
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handler.1.handle(
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self,
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self,
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DMACardAccessor {
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DMACardAccessorBuilder {
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backplane: self,
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backplane: self,
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card_no: handler.0,
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card_no: handler.0,
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},
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},
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@ -1,5 +1,5 @@
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use crate::{
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use crate::{
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backplane::DMAHandler,
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backplane::{Backplane, DMACardAccessorBuilder, DMAHandler},
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card::{u16_get_be_byte, u32_get_be_byte, u32_set_be_byte, Card},
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card::{u16_get_be_byte, u32_get_be_byte, u32_set_be_byte, Card},
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m68k::BusError,
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m68k::BusError,
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register,
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register,
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@ -34,10 +34,12 @@ bitflags! {
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#[derive(Debug)]
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#[derive(Debug)]
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pub struct Storage {
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pub struct Storage {
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file: Option<(File, String)>,
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file: Option<(File, String)>,
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read_data: VecDeque<u8>,
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transfer: bool,
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sector: u32,
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sector: u32,
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count: u32,
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count: u32,
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status: Status,
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status: Status,
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read_data: VecDeque<u8>,
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start_addresss: u32,
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}
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}
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// Registers
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// Registers
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@ -45,6 +47,7 @@ pub struct Storage {
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// 0x4-0x8: Sector count
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// 0x4-0x8: Sector count
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// 0x8-0xA: Command (W) / Status(R)
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// 0x8-0xA: Command (W) / Status(R)
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// 0xA-0xC: Data
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// 0xA-0xC: Data
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// 0xC-0x11: Start address for DMA
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impl Card for Storage {
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impl Card for Storage {
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fn new(data: Value) -> anyhow::Result<(Self, Option<Box<dyn DMAHandler>>)> {
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fn new(data: Value) -> anyhow::Result<(Self, Option<Box<dyn DMAHandler>>)> {
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@ -60,12 +63,14 @@ impl Card for Storage {
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Ok((
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Ok((
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Self {
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Self {
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file: file.zip(file_name),
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file: file.zip(file_name),
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read_data: VecDeque::new(),
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transfer: false,
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sector: 0,
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sector: 0,
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count: 0,
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count: 0,
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status: Status::empty(),
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status: Status::empty(),
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read_data: VecDeque::new(),
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start_addresss: 0,
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},
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},
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None,
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Some(Box::new(Dma)),
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))
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))
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}
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}
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@ -80,6 +85,7 @@ impl Card for Storage {
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}
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}
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NullableResult::Ok(self.read_data.pop_front().unwrap_or(0))
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NullableResult::Ok(self.read_data.pop_front().unwrap_or(0))
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}
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}
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0xC..=0x10 => NullableResult::Ok(u32_get_be_byte(self.start_addresss, address - 0xD)),
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0xFF => NullableResult::Ok(4),
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0xFF => NullableResult::Ok(4),
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_ => NullableResult::Null,
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_ => NullableResult::Null,
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}
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}
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@ -107,8 +113,23 @@ impl Card for Storage {
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self.status.set(Status::DATA_READY, true);
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self.status.set(Status::DATA_READY, true);
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}
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}
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}
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}
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0x1 => {
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if let Some((file, _)) = &mut self.file {
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file.seek(SeekFrom::Start(self.sector as u64 * SECTOR_SIZE))
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.unwrap();
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let mut buf = Vec::new();
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buf.resize(self.count as usize * SECTOR_SIZE as usize, 0);
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file.read_exact(&mut buf).unwrap();
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self.read_data.extend(buf);
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self.status.set(Status::BUSY, true);
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self.transfer = true;
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}
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}
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_ => (),
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_ => (),
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},
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},
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0xC..=0x10 => {
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self.start_addresss = u32_set_be_byte(self.start_addresss, address - 0xC, data);
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}
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_ => (),
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_ => (),
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}
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}
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NullableResult::Ok(())
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NullableResult::Ok(())
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@ -141,3 +162,23 @@ impl Display for Storage {
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}
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}
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register!(Storage, "storage");
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register!(Storage, "storage");
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#[derive(Debug)]
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struct Dma;
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impl DMAHandler for Dma {
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fn handle<'a>(&mut self, backplane: &'a Backplane, card_accessor: DMACardAccessorBuilder<'a>) {
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let card_accessor = card_accessor.build::<Storage>();
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if card_accessor.get().transfer {
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let mut address = card_accessor.get().start_addresss;
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#[allow(clippy::redundant_closure_call)]
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// Closure is used to drop the mutex guard between pop calls to prevent deadlock
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while let Some(data) = (|| card_accessor.get().read_data.pop_front())() {
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backplane.write_byte(address, data).unwrap();
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address += 1;
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}
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card_accessor.get().transfer = false;
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card_accessor.get().status.set(Status::BUSY, false);
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}
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}
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}
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