Fix reset instruction to reset bus, not cpu

This commit is contained in:
pjht 2022-11-14 10:57:53 -06:00
parent 7656d04cd8
commit f728080c92

View File

@ -421,7 +421,9 @@ impl M68K {
MoveDirection::RegToMem => self.usp = self.read_effective(areg, Size::Long), MoveDirection::RegToMem => self.usp = self.read_effective(areg, Size::Long),
} }
} }
Instruction::Reset => self.reset(), Instruction::Reset => {
self.bus.reset();
}
Instruction::Nop => (), Instruction::Nop => (),
Instruction::Stop(sr) => { Instruction::Stop(sr) => {
self.sr = sr; self.sr = sr;