Return bus errors from cpu.step() instead of panicking
This commit is contained in:
parent
077050fb2b
commit
d32a46b93b
10
src/disas.rs
10
src/disas.rs
@ -62,14 +62,14 @@ pub fn disasm<T>(
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#[derive(Debug)]
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#[derive(Debug)]
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pub enum DisassemblyError<T> {
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pub enum DisassemblyError<T> {
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InvalidInstruction,
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InvalidInstruction,
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ReadError(u32, T),
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ReadError(T),
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}
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}
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impl<T: Display> Display for DisassemblyError<T> {
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impl<T: Display> Display for DisassemblyError<T> {
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fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
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fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
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match self {
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match self {
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Self::InvalidInstruction => f.write_str("Invalid instruction"),
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Self::InvalidInstruction => f.write_str("Invalid instruction"),
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Self::ReadError(addr, e) => f.write_fmt(format_args!("Read error at {} ({})", addr, e)),
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Self::ReadError(e) => f.write_fmt(format_args!("{}", e)),
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}
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}
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}
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}
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}
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}
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@ -926,11 +926,9 @@ impl<T> Disasm<'_, T> {
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}
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}
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fn read_prog_word(&mut self) -> Result<u16, DisassemblyError<T>> {
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fn read_prog_word(&mut self) -> Result<u16, DisassemblyError<T>> {
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let word = ((self.byte_read)(self.pc)
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let word = ((self.byte_read)(self.pc).map_err(|e| DisassemblyError::ReadError(e))? as u16)
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.map_err(|e| DisassemblyError::ReadError(self.pc, e))? as u16)
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<< 8
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<< 8
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| ((self.byte_read)(self.pc + 1)
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| ((self.byte_read)(self.pc + 1).map_err(|e| DisassemblyError::ReadError(e))? as u16);
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.map_err(|e| DisassemblyError::ReadError(self.pc + 1, e))? as u16);
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self.pc += 2;
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self.pc += 2;
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Ok(word)
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Ok(word)
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}
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}
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540
src/m68k.rs
540
src/m68k.rs
File diff suppressed because it is too large
Load Diff
12
src/main.rs
12
src/main.rs
@ -18,7 +18,7 @@ mod term;
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use crate::{
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use crate::{
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backplane::Backplane,
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backplane::Backplane,
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location::Location,
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location::Location,
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m68k::{BusError, M68K},
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m68k::{DetailedBusError, M68K},
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};
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};
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use anyhow::anyhow;
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use anyhow::anyhow;
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use clap::Parser;
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use clap::Parser;
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@ -79,7 +79,13 @@ fn main() -> Result<(), anyhow::Error> {
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if args.run {
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if args.run {
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let mut out = String::new();
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let mut out = String::new();
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while !state.cpu.stopped {
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while !state.cpu.stopped {
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state.cpu.step();
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match state.cpu.step() {
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Ok(()) => (),
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Err(e) => {
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println!("{}", e);
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state.cpu.stopped = true;
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}
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}
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}
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}
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out += &format!("{}\n", state.cpu);
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out += &format!("{}\n", state.cpu);
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let pc = state.cpu.pc();
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let pc = state.cpu.pc();
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@ -458,7 +464,7 @@ fn disas_fmt(
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cpu: &mut M68K,
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cpu: &mut M68K,
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addr: u32,
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addr: u32,
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symbol_tables: &SymbolTables,
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symbol_tables: &SymbolTables,
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) -> (String, Result<u32, DisassemblyError<BusError>>) {
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) -> (String, Result<u32, DisassemblyError<DetailedBusError>>) {
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let addr_fmt = if let Some((table, symbol, offset)) = symbol_tables.address_to_symbol(addr) {
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let addr_fmt = if let Some((table, symbol, offset)) = symbol_tables.address_to_symbol(addr) {
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format!("{}:{} + {} (0x{:x})", table, symbol, offset, addr)
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format!("{}:{} + {} (0x{:x})", table, symbol, offset, addr)
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} else {
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} else {
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