diff --git a/src/disas.rs b/src/disas.rs index 97f7d2c..09d8ffa 100644 --- a/src/disas.rs +++ b/src/disas.rs @@ -385,6 +385,12 @@ impl Disasm<'_, T> { let dst_reg = ins_word[13..16].load_be::(); let dst = self.decode_effective(dst_mode, dst_reg, size)?; Ok(Instruction::MoveFromSr(dst)) + } else if ins_word[4..10].load_be::() == 0b00_1011 { + let dst_mode = + AddressingMode::try_from(ins_word[10..13].load_be::()).unwrap(); + let dst_reg = ins_word[13..16].load_be::(); + let dst = self.decode_effective(dst_mode, dst_reg, size)?; + Ok(Instruction::MoveFromCcr(dst)) } else if ins_word[4..10].load_be::() == 0b01_0011 { let src_mode = AddressingMode::try_from(ins_word[10..13].load_be::()).unwrap(); diff --git a/src/instruction.rs b/src/instruction.rs index 2ef9a46..91860f6 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -318,6 +318,7 @@ pub enum Instruction { size: Size, }, MoveFromSr(EffectiveAddress), + MoveFromCcr(EffectiveAddress), MoveToCcr(EffectiveAddress), MoveToSr(EffectiveAddress), Negx(Size, EffectiveAddress), @@ -461,6 +462,7 @@ impl Display for Instruction { }, Self::Move { src, dst, size } => write!(f, "MOVE.{size} {src}, {dst}"), Self::MoveFromSr(dst) => write!(f, "MOVE SR, {dst}"), + Self::MoveFromCcr(dst) => write!(f, "MOVE CCR, {dst}"), Self::MoveToCcr(src) => write!(f, "MOVE {src}, CCR"), Self::MoveToSr(src) => write!(f, "MOVE {src}, SR"), Self::Negx(size, dst) => write!(f, "NEGX.{size} {dst}"), diff --git a/src/m68k.rs b/src/m68k.rs index 644a4b7..c5e175a 100644 --- a/src/m68k.rs +++ b/src/m68k.rs @@ -536,6 +536,9 @@ impl M68K { self.sr = (self.sr & 0xFFE0) | new_flags; } } + Instruction::MoveFromCcr(dst) => { + self.write_effective(dst, u32::from(self.sr & 0xFF), Size::Word)?; + } Instruction::MoveFromSr(dst) => { self.write_effective(dst, u32::from(self.sr), Size::Word)?; }