From 6066b2d239e63658fd8ab740d037f68d2ac23318 Mon Sep 17 00:00:00 2001
From: pjht <terppa05@gmail.com>
Date: Sat, 18 Mar 2023 17:51:34 -0500
Subject: [PATCH] Limit address from CPU to 24 bits

---
 src/m68k.rs | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/m68k.rs b/src/m68k.rs
index de81c6a..2e4ac13 100644
--- a/src/m68k.rs
+++ b/src/m68k.rs
@@ -62,13 +62,6 @@ impl Display for DetailedBusError {
 
 impl Error for DetailedBusError {}
 
-// pub trait Bus: Debug {
-//     fn read_word(&mut self, address: u32) -> Result<u16, BusError>;
-//     fn read_byte(&mut self, address: u32) -> Result<u8, BusError>;
-//     fn write_word(&mut self, address: u32, data: u16) -> Result<(), BusError>;
-//     fn write_byte(&mut self, address: u32, data: u8) -> Result<(), BusError>;
-// }
-
 #[derive(Debug)]
 pub struct M68K {
     dregs: [u32; 8],
@@ -1194,6 +1187,7 @@ impl M68K {
 
     fn read_address(&mut self, address: u32, size: Size) -> Result<u32, DetailedBusError> {
         // println!("READ {:x}, {:?}", address, size);
+        let address = address & 0xFF_FFFF;
         match size {
             Size::Byte => Ok(u32::from(self.read_byte(address)?)),
             Size::Word => Ok(u32::from(self.read_word(address)?)),
@@ -1223,6 +1217,7 @@ impl M68K {
     }
 
     fn read_byte(&mut self, address: u32) -> Result<u8, DetailedBusError> {
+        let address = address & 0xFF_FFFF;
         self.bus.read_byte(address).map_err(|_| DetailedBusError {
             address,
             cause: BusErrorCause::ReadingByte,
@@ -1230,6 +1225,7 @@ impl M68K {
     }
 
     fn write_byte(&mut self, address: u32, data: u8) -> Result<(), DetailedBusError> {
+        let address = address & 0xFF_FFFF;
         self.bus
             .write_byte(address, data)
             .map_err(|_| DetailedBusError {
@@ -1239,6 +1235,7 @@ impl M68K {
     }
 
     fn read_word(&mut self, address: u32) -> Result<u16, DetailedBusError> {
+        let address = address & 0xFF_FFFF;
         if address & 0x1 != 0 {
             self.trap(3)?;
         }
@@ -1249,6 +1246,7 @@ impl M68K {
     }
 
     fn write_word(&mut self, address: u32, data: u16) -> Result<(), DetailedBusError> {
+        let address = address & 0xFF_FFFF;
         if address & 0x1 != 0 {
             self.trap(3)?;
         }