diff --git a/src/backplane.rs b/src/backplane.rs index b0f1222..59a4afe 100644 --- a/src/backplane.rs +++ b/src/backplane.rs @@ -9,6 +9,7 @@ use anyhow::anyhow; use itertools::Itertools; use nullable_result::{GeneralIterExt, NullableResult}; +use crate::m68k::FunctionCode; use crate::InterconnectConfig; use crate::{ card::{self, Card}, @@ -151,102 +152,102 @@ impl Backplane { .cmd(cmd, self) } - pub fn read_word(&self, address: u32, supervisor: bool) -> Result { + pub fn read_word(&self, address: u32, function: FunctionCode) -> Result { self.mem_helper( address, - |address, mut card| card.read_word(address), - |address, mut card| card.read_word_io(address as u8), + |address, mut card| card.read_word(address, function), + |address, mut card| card.read_word_io(address as u8, function), |address| self.read_word_io(address as u8), false, false, - supervisor, + function, ) } - pub fn read_byte(&self, address: u32, supervisor: bool) -> Result { + pub fn read_byte(&self, address: u32, function: FunctionCode) -> Result { self.mem_helper( address, - |address, mut card| card.read_byte(address), - |address, mut card| card.read_byte_io(address as u8), + |address, mut card| card.read_byte(address, function), + |address, mut card| card.read_byte_io(address as u8, function), |address| self.read_byte_io(address as u8), false, false, - supervisor, + function, ) } - pub fn write_word(&self, address: u32, data: u16, supervisor: bool) -> Result<(), BusError> { + pub fn write_word(&self, address: u32, data: u16, function: FunctionCode) -> Result<(), BusError> { self.mem_helper( address, - |address, mut card| card.write_word(address, data), - |address, mut card| card.write_word_io(address as u8, data), + |address, mut card| card.write_word(address, data, function), + |address, mut card| card.write_word_io(address as u8, data, function), |address| self.write_word_io(address as u8, data), false, true, - supervisor, + function, ) } - pub fn write_byte(&self, address: u32, data: u8, supervisor: bool) -> Result<(), BusError> { + pub fn write_byte(&self, address: u32, data: u8, function: FunctionCode) -> Result<(), BusError> { self.mem_helper( address, - |address, mut card| card.write_byte(address, data), - |address, mut card| card.write_byte_io(address as u8, data), + |address, mut card| card.write_byte(address, data, function), + |address, mut card| card.write_byte_io(address as u8, data, function), |address| self.write_byte_io(address as u8, data), false, true, - supervisor, + function, ) } - pub fn read_word_phys(&self, address: u32) -> Result { + pub fn read_word_phys(&self, address: u32, function: FunctionCode) -> Result { self.mem_helper( address, - |address, mut card| card.read_word(address), - |address, mut card| card.read_word_io(address as u8), + |address, mut card| card.read_word(address, function), + |address, mut card| card.read_word_io(address as u8, function), |address| self.read_word_io(address as u8), true, false, - true, + function, ) } #[allow(dead_code)] - pub fn read_byte_phys(&self, address: u32) -> Result { + pub fn read_byte_phys(&self, address: u32, function: FunctionCode) -> Result { self.mem_helper( address, - |address, mut card| card.read_byte(address), - |address, mut card| card.read_byte_io(address as u8), + |address, mut card| card.read_byte(address, function), + |address, mut card| card.read_byte_io(address as u8, function), |address| self.read_byte_io(address as u8), true, false, - true, + function, ) } #[allow(dead_code)] - pub fn write_word_phys(&self, address: u32, data: u16) -> Result<(), BusError> { + pub fn write_word_phys(&self, address: u32, data: u16, function: FunctionCode) -> Result<(), BusError> { self.mem_helper( address, - |address, mut card| card.write_word(address, data), - |address, mut card| card.write_word_io(address as u8, data), + |address, mut card| card.write_word(address, data, function), + |address, mut card| card.write_word_io(address as u8, data, function), |address| self.write_word_io(address as u8, data), true, true, - true, + function, ) } #[allow(dead_code)] - pub fn write_byte_phys(&self, address: u32, data: u8) -> Result<(), BusError> { + pub fn write_byte_phys(&self, address: u32, data: u8, function: FunctionCode) -> Result<(), BusError> { self.mem_helper( address, - |address, mut card| card.write_byte(address, data), - |address, mut card| card.write_byte_io(address as u8, data), + |address, mut card| card.write_byte(address, data, function), + |address, mut card| card.write_byte_io(address as u8, data, function), |address| self.write_byte_io(address as u8, data), true, true, - true, + function, ) } @@ -258,7 +259,7 @@ impl Backplane { mut backplane_io_func: B, bypass_mmu: bool, write: bool, - supervisor: bool, + function: FunctionCode, ) -> Result where M: FnMut(u32, RefMut<'_, dyn Card>) -> NullableResult, @@ -272,7 +273,7 @@ impl Backplane { .borrow_mut() .try_as_mmu() .unwrap() - .translate_address(self, address, write, supervisor) + .translate_address(self, address, write, function) { NullableResult::Ok(address) => address, NullableResult::Err(e) => return Err(e), diff --git a/src/card.rs b/src/card.rs index a905ef8..5b72687 100644 --- a/src/card.rs +++ b/src/card.rs @@ -2,7 +2,7 @@ use crate::{ backplane::{Backplane, InterconnectSenderBuilder}, - m68k::BusError, + m68k::{BusError, FunctionCode}, }; use anyhow::anyhow; use mopa::mopafy; @@ -67,47 +67,47 @@ pub trait Card: Debug + Display + mopa::Any { Ok(Rc::new(RefCell::new(card))) } - fn read_byte(&mut self, _address: u32) -> NullableResult { + fn read_byte(&mut self, _address: u32, _function: FunctionCode) -> NullableResult { NullableResult::Null } - fn write_byte(&mut self, _address: u32, _data: u8) -> NullableResult<(), BusError> { + fn write_byte(&mut self, _address: u32, _data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { NullableResult::Null } - fn read_byte_io(&mut self, _address: u8) -> NullableResult { + fn read_byte_io(&mut self, _address: u8, _function: FunctionCode) -> NullableResult { NullableResult::Null } - fn write_byte_io(&mut self, _address: u8, _data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, _address: u8, _data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { NullableResult::Null } - fn read_word(&mut self, address: u32) -> NullableResult { + fn read_word(&mut self, address: u32, function: FunctionCode) -> NullableResult { assert!((address & 0x1) == 0); - let upper_byte = self.read_byte(address)?; - let lower_byte = self.read_byte(address + 1)?; + let upper_byte = self.read_byte(address, function)?; + let lower_byte = self.read_byte(address + 1, function)?; NullableResult::Ok((u16::from(upper_byte) << 8) | u16::from(lower_byte)) } - fn write_word(&mut self, address: u32, data: u16) -> NullableResult<(), BusError> { + fn write_word(&mut self, address: u32, data: u16, function: FunctionCode) -> NullableResult<(), BusError> { assert!((address & 0x1) == 0); - self.write_byte(address, (data >> 8) as u8)?; - self.write_byte(address + 1, data as u8)?; + self.write_byte(address, (data >> 8) as u8, function)?; + self.write_byte(address + 1, data as u8, function)?; NullableResult::Ok(()) } - fn read_word_io(&mut self, address: u8) -> NullableResult { + fn read_word_io(&mut self, address: u8, function: FunctionCode) -> NullableResult { assert!((address & 0x1) == 0); - let upper_byte = self.read_byte_io(address)?; - let lower_byte = self.read_byte_io(address + 1)?; + let upper_byte = self.read_byte_io(address, function)?; + let lower_byte = self.read_byte_io(address + 1, function)?; NullableResult::Ok((u16::from(upper_byte) << 8) | u16::from(lower_byte)) } - fn write_word_io(&mut self, address: u8, data: u16) -> NullableResult<(), BusError> { + fn write_word_io(&mut self, address: u8, data: u16, function: FunctionCode) -> NullableResult<(), BusError> { assert!((address & 0x1) == 0); - self.write_byte_io(address, (data >> 8) as u8)?; - self.write_byte_io(address + 1, data as u8)?; + self.write_byte_io(address, (data >> 8) as u8, function)?; + self.write_byte_io(address + 1, data as u8, function)?; NullableResult::Ok(()) } @@ -145,7 +145,7 @@ pub trait Mmu: Debug { backplane: &Backplane, address: u32, write: bool, - supervisor: bool, + function: FunctionCode ) -> NullableResult; } diff --git a/src/m68k.rs b/src/m68k.rs index fcaa338..8c4e08c 100644 --- a/src/m68k.rs +++ b/src/m68k.rs @@ -162,6 +162,33 @@ impl Display for InsExecError { } } +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum FunctionCode { + UserData, + UserProgram, + SupervisorData, + SupervisorProgram, +} + +impl FunctionCode { + pub fn new(code: bool, supervisor: bool) -> Self { + match (supervisor, code) { + (false, false) => Self::UserData, + (false, true) => Self::UserProgram, + (true, false) => Self::SupervisorData, + (true, true) => Self::SupervisorProgram, + } + } + + pub fn is_code(self) -> bool { + self == Self::UserProgram || self == Self::SupervisorProgram + } + + pub fn is_supervisor(self) -> bool { + self == Self::SupervisorData || self == Self::SupervisorProgram + } +} + #[derive(Debug)] pub struct M68K { dregs: [u32; 8], @@ -234,11 +261,12 @@ impl M68K { } pub fn reset(&mut self) { + let function = FunctionCode::SupervisorProgram; if let (Ok(ssp_high), Ok(ssp_low), Ok(pc_high), Ok(pc_low)) = ( - self.read_word(0), - self.read_word(2), - self.read_word(4), - self.read_word(6), + self.read_word(0, function), + self.read_word(2, function), + self.read_word(4, function), + self.read_word(6, function), ) { self.ssp = (u32::from(ssp_high) << 16) | u32::from(ssp_low); self.vbr = 0; @@ -260,7 +288,7 @@ impl M68K { loc: u32, ) -> Result<(Instruction, u32), DisassemblyError> { disas::disasm(loc, &mut |addr| { - self.read_word(addr).map_err(|err| match err { + self.read_word(addr, FunctionCode::new(true, self.is_supervisor())).map_err(|err| match err { InsExecError::AbnormalTrap => InsExecError::AbnormalTrap, InsExecError::BusError(err) => InsExecError::BusError(DetailedBusError { cause: BusErrorCause::ReadingInstruction, @@ -1502,30 +1530,32 @@ impl M68K { } fn read_address(&mut self, address: u32, size: Size) -> Result { + let function = FunctionCode::new(false, self.is_supervisor()); let address = address & 0xFF_FFFF; match size { - Size::Byte => Ok(u32::from(self.read_byte(address)?)), - Size::Word => Ok(u32::from(self.read_word(address)?)), + Size::Byte => Ok(u32::from(self.read_byte(address, function)?)), + Size::Word => Ok(u32::from(self.read_word(address, function)?)), Size::Long => { - Ok(u32::from(self.read_word(address)?) << 16 - | u32::from(self.read_word(address + 2)?)) + Ok(u32::from(self.read_word(address, function)?) << 16 + | u32::from(self.read_word(address + 2, function)?)) } } } fn write_address(&mut self, address: u32, data: u32, size: Size) -> Result<(), InsExecError> { + let function = FunctionCode::new(false, self.is_supervisor()); match size { - Size::Byte => self.write_byte(address, data as u8)?, - Size::Word => self.write_word(address, data as u16)?, + Size::Byte => self.write_byte(address, data as u8, function)?, + Size::Word => self.write_word(address, data as u16, function)?, Size::Long => { - self.write_word(address, (data >> 16) as u16)?; - self.write_word(address + 2, data as u16)?; + self.write_word(address, (data >> 16) as u16, function)?; + self.write_word(address + 2, data as u16, function)?; } } Ok(()) } - fn read_byte(&mut self, address: u32) -> Result { + fn read_byte(&mut self, address: u32, function: FunctionCode) -> Result { let address = address & 0xFF_FFFF; if self.use_stored_mem_cycles { let cycle = self.stored_mem_cycles.remove(0); @@ -1543,7 +1573,7 @@ impl M68K { } let result = self .bus - .read_byte(address, self.is_supervisor()) + .read_byte(address, function) .map_err(|_| DetailedBusError { address, cause: BusErrorCause::ReadingByte, @@ -1555,7 +1585,7 @@ impl M68K { Ok(result?) } - fn write_byte(&mut self, address: u32, data: u8) -> Result<(), InsExecError> { + fn write_byte(&mut self, address: u32, data: u8, function: FunctionCode) -> Result<(), InsExecError> { let address = address & 0xFF_FFFF; if self.use_stored_mem_cycles { let cycle = self.stored_mem_cycles.remove(0); @@ -1579,7 +1609,7 @@ impl M68K { } let result = self .bus - .write_byte(address, data, self.is_supervisor()) + .write_byte(address, data, function) .map_err(|_| DetailedBusError { address, cause: BusErrorCause::WritingByte, @@ -1594,7 +1624,7 @@ impl M68K { Ok(result?) } - fn read_word(&mut self, address: u32) -> Result { + fn read_word(&mut self, address: u32, function: FunctionCode) -> Result { let address = address & 0xFF_FFFF; if address & 0x1 != 0 { self.trap(3)?; @@ -1616,7 +1646,7 @@ impl M68K { } let result = self .bus - .read_word(address, self.is_supervisor()) + .read_word(address, function) .map_err(|_| DetailedBusError { address, cause: BusErrorCause::ReadingWord, @@ -1628,7 +1658,7 @@ impl M68K { Ok(result?) } - fn write_word(&mut self, address: u32, data: u16) -> Result<(), InsExecError> { + fn write_word(&mut self, address: u32, data: u16, function: FunctionCode) -> Result<(), InsExecError> { let address = address & 0xFF_FFFF; if address & 0x1 != 0 { self.trap(3)?; @@ -1656,7 +1686,7 @@ impl M68K { } let result = self .bus - .write_word(address, data, self.is_supervisor()) + .write_word(address, data, function) .map_err(|_| DetailedBusError { address, cause: BusErrorCause::WritingWord, diff --git a/src/main.rs b/src/main.rs index dbc0108..f4514b4 100644 --- a/src/main.rs +++ b/src/main.rs @@ -21,7 +21,7 @@ use clap::Parser; use disas::DisassemblyError; use indexmap::IndexSet; use itertools::Itertools; -use m68k::InsExecError; +use m68k::{FunctionCode, InsExecError}; use parse_int::parse; use reedline_repl_rs::{ clap::{builder::BoolishValueParser, Arg, ArgAction, Command}, @@ -280,25 +280,26 @@ fn main() -> Result<(), anyhow::Error> { } let mut data = Vec::new(); let bus = state.cpu.bus_mut(); + let function = FunctionCode::SupervisorData; if args.get_flag("phys") { for i in 0..count { match size { - peek::Size::Byte => data.push(u32::from(bus.read_byte_phys(addr + i)?)), - peek::Size::Word => data.push(u32::from(bus.read_word_phys(addr + (i * 2))?)), + peek::Size::Byte => data.push(u32::from(bus.read_byte_phys(addr + i, function)?)), + peek::Size::Word => data.push(u32::from(bus.read_word_phys(addr + (i * 2), function)?)), peek::Size::LongWord => data.push( - u32::from(bus.read_word_phys(addr + (i * 4))?) << 16 - | u32::from(bus.read_word_phys(addr + (i * 4) + 2)?), + u32::from(bus.read_word_phys(addr + (i * 4), function)?) << 16 + | u32::from(bus.read_word_phys(addr + (i * 4) + 2, function)?), ), } } } else { for i in 0..count { match size { - peek::Size::Byte => data.push(u32::from(bus.read_byte(addr + i, true)?)), - peek::Size::Word => data.push(u32::from(bus.read_word(addr + (i * 2), true)?)), + peek::Size::Byte => data.push(u32::from(bus.read_byte(addr + i, function)?)), + peek::Size::Word => data.push(u32::from(bus.read_word(addr + (i * 2), function)?)), peek::Size::LongWord => data.push( - u32::from(bus.read_word(addr + (i * 4), true)?) << 16 - | u32::from(bus.read_word(addr + (i * 4) + 2, true)?), + u32::from(bus.read_word(addr + (i * 4), function)?) << 16 + | u32::from(bus.read_word(addr + (i * 4) + 2, function)?), ), } } @@ -330,15 +331,16 @@ fn main() -> Result<(), anyhow::Error> { .about("Write to a memory address"), |args, state| { let address = parse::(args.get_one::("address").unwrap())?; + let function = FunctionCode::SupervisorData; if args.get_flag("word") { if (address & 0x1) != 0 { return Err(anyhow!("Cannot poke a word to a non-aligned address")); } let data = parse::(args.get_one::("data").unwrap())?; - state.cpu.bus_mut().write_word(address, data, true)?; + state.cpu.bus_mut().write_word(address, data, function)?; } else { let data = parse::(args.get_one::("data").unwrap())?; - state.cpu.bus_mut().write_byte(address, data, true)?; + state.cpu.bus_mut().write_byte(address, data, function)?; } Ok(None) } diff --git a/src/mmu.rs b/src/mmu.rs index 9a9f46a..59fe1c0 100644 --- a/src/mmu.rs +++ b/src/mmu.rs @@ -5,7 +5,7 @@ use nullable_result::NullableResult; use crate::{ backplane::Backplane, card::{u16_get_be_byte, u32_get_be_byte, u32_set_be_byte, Card, Mmu}, - m68k::BusError, + m68k::{BusError, FunctionCode}, register, }; @@ -39,8 +39,8 @@ impl MmuCard { if print_debug { println!("Mapping is at {mapping_address:#x}"); } - let mapping_hi = backplane.read_word_phys(mapping_address)?; - let mapping_lo = backplane.read_word_phys(mapping_address + 2)?; + let mapping_hi = backplane.read_word_phys(mapping_address, FunctionCode::SupervisorData)?; + let mapping_lo = backplane.read_word_phys(mapping_address + 2, FunctionCode::SupervisorData)?; NullableResult::Ok((u32::from(mapping_hi) << 16 | u32::from(mapping_lo)) | TLB_MAPPING_FLAG_VALID) } } @@ -61,7 +61,7 @@ impl Card for MmuCard { Some(self) } - fn read_byte_io(&mut self, address: u8) -> NullableResult { + fn read_byte_io(&mut self, address: u8, _function: FunctionCode) -> NullableResult { match address { (0x0..=0xF) => { let map_no = (address / 4) as usize; @@ -77,7 +77,7 @@ impl Card for MmuCard { } } - fn write_byte_io(&mut self, address: u8, data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, address: u8, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { match address { (0x0..=0xF) => { let map_no = (address / 4) as usize; @@ -344,7 +344,7 @@ impl Mmu for MmuCard { backplane: &Backplane, address: u32, write: bool, - supervisor: bool, + function: FunctionCode, ) -> NullableResult { let print_debug = self.print_debug; if self.enabled { @@ -368,7 +368,7 @@ impl Mmu for MmuCard { mapping }; if mapping & MAPPING_FLAG_PRESENT > 0 { - if !supervisor && (mapping & MAPPING_FLAG_USER == 0) { + if !function.is_supervisor() && (mapping & MAPPING_FLAG_USER == 0) { if print_debug { println!("Page not user accessible"); } diff --git a/src/ram.rs b/src/ram.rs index ca8dd94..f04f586 100644 --- a/src/ram.rs +++ b/src/ram.rs @@ -7,7 +7,7 @@ use toml::Value; use crate::{ card::{u16_get_be_byte, u32_get_be_byte, Card}, - m68k::BusError, + m68k::{BusError, FunctionCode}, register, }; @@ -34,7 +34,7 @@ impl Card for Ram { enabled: false, }) } - fn read_byte(&mut self, address: u32) -> NullableResult { + fn read_byte(&mut self, address: u32, _function: FunctionCode) -> NullableResult { if !self.enabled { return NullableResult::Null; } @@ -42,7 +42,7 @@ impl Card for Ram { self.data.get(address as usize).copied().into() } - fn write_byte(&mut self, address: u32, data: u8) -> NullableResult<(), BusError> { + fn write_byte(&mut self, address: u32, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { if !self.enabled { return NullableResult::Null; } @@ -54,7 +54,7 @@ impl Card for Ram { NullableResult::Ok(()) } - fn write_byte_io(&mut self, address: u8, data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, address: u8, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { match address { 0 => self.start = self.start & !0xFF00_0000 | (u32::from(data) << 24), 1 => self.start = self.start & !0x00FF_0000 | (u32::from(data) << 16), @@ -68,7 +68,7 @@ impl Card for Ram { NullableResult::Ok(()) } - fn read_byte_io(&mut self, address: u8) -> NullableResult { + fn read_byte_io(&mut self, address: u8, _function: FunctionCode) -> NullableResult { match address { 0 => NullableResult::Ok((self.start >> 24) as u8), 1 => NullableResult::Ok((self.start >> 16) as u8), diff --git a/src/rom.rs b/src/rom.rs index 673d600..968789d 100644 --- a/src/rom.rs +++ b/src/rom.rs @@ -7,7 +7,7 @@ use serde::Deserialize; use toml::Value; use crate::{ - backplane::Backplane, card::{u16_get_be_byte, u16_set_be_byte, Card}, m68k::BusError, register + backplane::Backplane, card::{u16_get_be_byte, u16_set_be_byte, Card}, m68k::{BusError, FunctionCode}, register }; const ID: u16 = 1; @@ -47,7 +47,7 @@ impl Card for Rom { }) } - fn read_byte(&mut self, address: u32) -> NullableResult { + fn read_byte(&mut self, address: u32, _function: FunctionCode) -> NullableResult { if !self.enabled | ((address >> 16) as u16 != self.start) { return NullableResult::Null; } @@ -59,7 +59,7 @@ impl Card for Rom { } } - fn write_byte(&mut self, address: u32, data: u8) -> NullableResult<(), BusError> { + fn write_byte(&mut self, address: u32, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { if !self.enabled | ((address >> 16) as u16 != self.start) { return NullableResult::Null; } @@ -71,7 +71,7 @@ impl Card for Rom { NullableResult::Ok(()) } - fn read_byte_io(&mut self, address: u8) -> NullableResult { + fn read_byte_io(&mut self, address: u8, _function: FunctionCode) -> NullableResult { match address { (0..=0xEF) => NullableResult::Ok(self.ram[address as usize]), (0xF0..=0xF1) => NullableResult::Ok(u16_get_be_byte(self.start, address - 0xF0)), @@ -81,7 +81,7 @@ impl Card for Rom { } } - fn write_byte_io(&mut self, address: u8, data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, address: u8, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { match address { (0..=0xEF) => { self.ram[address as usize] = data; diff --git a/src/storage.rs b/src/storage.rs index 245c9b8..b84b977 100644 --- a/src/storage.rs +++ b/src/storage.rs @@ -1,7 +1,7 @@ use crate::{ backplane::Backplane, card::{u16_get_be_byte, u32_get_be_byte, u32_set_be_byte, Card}, - m68k::BusError, + m68k::{BusError, FunctionCode}, register, }; use anyhow::anyhow; @@ -72,7 +72,7 @@ impl Card for Storage { }) } - fn read_byte_io(&mut self, address: u8) -> NullableResult { + fn read_byte_io(&mut self, address: u8, _function: FunctionCode) -> NullableResult { match address { 0x0..=0x3 => NullableResult::Ok(u32_get_be_byte(self.sector, address)), 0x4..=0x7 => NullableResult::Ok(u32_get_be_byte(self.count, address - 0x4)), @@ -89,7 +89,7 @@ impl Card for Storage { } } - fn write_byte_io(&mut self, address: u8, data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, address: u8, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { match address { 0x0..=0x3 => { self.sector = u32_set_be_byte(self.sector, address, data); @@ -156,7 +156,7 @@ impl Card for Storage { // Closure is used to drop the mutex guard // between pop calls to prevent deadlock while let Some(data) = (|| self.read_data.pop_front())() { - backplane.write_byte(address, data, true).unwrap(); + backplane.write_byte(address, data, FunctionCode::SupervisorData).unwrap(); address += 1; } self.transfer = false; diff --git a/src/term.rs b/src/term.rs index 728e3f4..05c6634 100644 --- a/src/term.rs +++ b/src/term.rs @@ -5,7 +5,7 @@ use toml::Value; use crate::{ card::{u16_get_be_byte, Card}, - m68k::BusError, + m68k::{BusError, FunctionCode}, register, }; @@ -28,14 +28,14 @@ impl Card for Term { Ok(Self) } - fn read_byte_io(&mut self, address: u8) -> NullableResult { + fn read_byte_io(&mut self, address: u8, _function: FunctionCode) -> NullableResult { match address { (0xFE..=0xFF) => NullableResult::Ok(u16_get_be_byte(ID, address - 0xFE)), _ => NullableResult::Null, } } - fn write_byte_io(&mut self, address: u8, data: u8) -> NullableResult<(), BusError> { + fn write_byte_io(&mut self, address: u8, data: u8, _function: FunctionCode) -> NullableResult<(), BusError> { if address == 0 { print!("{}", data as char); }