From 094abebbd7980e0e3ea425d152d69a67d6f0f9f8 Mon Sep 17 00:00:00 2001 From: pjht Date: Mon, 17 Oct 2022 16:49:11 -0500 Subject: [PATCH] initial commit --- .gitignore | 29 + cpu_board.kicad_pcb | 1200 ++++++++++++ cpu_board.kicad_pro | 420 ++++ cpu_board.kicad_sch | 2889 ++++++++++++++++++++++++++++ cpu_board.rules | 91 + gerbers.zip | Bin 0 -> 29508 bytes gerbers/cpu_board-B_Cu.gbr | 1871 ++++++++++++++++++ gerbers/cpu_board-B_Mask.gbr | 334 ++++ gerbers/cpu_board-B_Paste.gbr | 15 + gerbers/cpu_board-B_Silkscreen.gbr | 15 + gerbers/cpu_board-Edge_Cuts.gbr | 26 + gerbers/cpu_board-F_Cu.gbr | 2445 +++++++++++++++++++++++ gerbers/cpu_board-F_Mask.gbr | 380 ++++ gerbers/cpu_board-F_Paste.gbr | 79 + gerbers/cpu_board-F_Silkscreen.gbr | 335 ++++ gerbers/cpu_board-job.gbrjob | 120 ++ sym-lib-table | 4 + 17 files changed, 10253 insertions(+) create mode 100644 .gitignore create mode 100644 cpu_board.kicad_pcb create mode 100644 cpu_board.kicad_pro create mode 100644 cpu_board.kicad_sch create mode 100644 cpu_board.rules create mode 100644 gerbers.zip create mode 100644 gerbers/cpu_board-B_Cu.gbr create mode 100644 gerbers/cpu_board-B_Mask.gbr create mode 100644 gerbers/cpu_board-B_Paste.gbr create mode 100644 gerbers/cpu_board-B_Silkscreen.gbr create mode 100644 gerbers/cpu_board-Edge_Cuts.gbr create mode 100644 gerbers/cpu_board-F_Cu.gbr create mode 100644 gerbers/cpu_board-F_Mask.gbr create mode 100644 gerbers/cpu_board-F_Paste.gbr create mode 100644 gerbers/cpu_board-F_Silkscreen.gbr create mode 100644 gerbers/cpu_board-job.gbrjob create mode 100644 sym-lib-table diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..a63bc0e --- /dev/null +++ b/.gitignore @@ -0,0 +1,29 @@ +# For PCBs designed using KiCad: https://www.kicad.org/ +# Format documentation: https://kicad.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*.kicad_sch-bak +*-backups +*.kicad_prl +*.sch-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/cpu_board.kicad_pcb b/cpu_board.kicad_pcb new file mode 100644 index 0000000..8583dce --- /dev/null +++ b/cpu_board.kicad_pcb @@ -0,0 +1,1200 @@ +(kicad_pcb (version 20211014) (generator pcbnew) + + (general + (thickness 1.6) + ) + + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + + (setup + (pad_to_mask_clearance 0) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (disableapertmacros false) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (svguseinch false) + (svgprecision 6) + (excludeedgelayer true) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (sketchpadsonfab false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "gerbers") + ) + ) + + (net 0 "") + (net 1 "/BUS_A1") + (net 2 "unconnected-(J1-Pad2)") + (net 3 "/BUS_A2") + (net 4 "unconnected-(J1-Pad4)") + (net 5 "/BUS_A3") + (net 6 "unconnected-(J1-Pad6)") + (net 7 "/BUS_A4") + (net 8 "unconnected-(J1-Pad8)") + (net 9 "/BUS_A5") + (net 10 "+5V") + (net 11 "/BUS_A6") + (net 12 "/~{BUS_BERR}") + (net 13 "/BUS_A7") + (net 14 "/~{BUS_DTACK}") + (net 15 "/BUS_A8") + (net 16 "/BUS_R{slash}~{W}") + (net 17 "/BUS_A9") + (net 18 "/~{BUS_LDS}") + (net 19 "/BUS_A10") + (net 20 "/~{BUS_UDS}") + (net 21 "/BUS_A11") + (net 22 "/~{BUS_AS}") + (net 23 "/BUS_A12") + (net 24 "/BUS_A23") + (net 25 "/BUS_A13") + (net 26 "/BUS_A22") + (net 27 "/BUS_A14") + (net 28 "/BUS_A21") + (net 29 "/BUS_A15") + (net 30 "/BUS_A20") + (net 31 "/BUS_A16") + (net 32 "/BUS_A19") + (net 33 "/BUS_A17") + (net 34 "/BUS_A18") + (net 35 "/CPU_A1") + (net 36 "unconnected-(J2-Pad2)") + (net 37 "/CPU_A2") + (net 38 "unconnected-(J2-Pad4)") + (net 39 "/CPU_A3") + (net 40 "unconnected-(J2-Pad6)") + (net 41 "/CPU_A4") + (net 42 "unconnected-(J2-Pad8)") + (net 43 "/CPU_A5") + (net 44 "/DCO") + (net 45 "/CPU_A6") + (net 46 "/~{CPU_BERR}") + (net 47 "/CPU_A7") + (net 48 "/~{CPU_DTACK}") + (net 49 "/CPU_A8") + (net 50 "/CPU_R{slash}~{W}") + (net 51 "/CPU_A9") + (net 52 "/~{CPU_LDS}") + (net 53 "/CPU_A10") + (net 54 "/~{CPU_UDS}") + (net 55 "/CPU_A11") + (net 56 "/~{CPU_AS}") + (net 57 "/CPU_A12") + (net 58 "/CPU_A23") + (net 59 "/CPU_A13") + (net 60 "/CPU_A22") + (net 61 "/CPU_A14") + (net 62 "/CPU_A21") + (net 63 "/CPU_A15") + (net 64 "/CPU_A20") + (net 65 "/CPU_A16") + (net 66 "/CPU_A19") + (net 67 "/CPU_A17") + (net 68 "/CPU_A18") + (net 69 "unconnected-(J3-Pad2)") + (net 70 "unconnected-(J3-Pad4)") + (net 71 "/~{BGACK}") + (net 72 "/~{BG}") + (net 73 "/~{BR}") + (net 74 "/D4") + (net 75 "/D3") + (net 76 "/D2") + (net 77 "/D1") + (net 78 "/D0") + (net 79 "unconnected-(J4-PadA24)") + (net 80 "unconnected-(J4-PadA25)") + (net 81 "unconnected-(J4-PadA26)") + (net 82 "/CLK") + (net 83 "GND") + (net 84 "unconnected-(J4-PadA27)") + (net 85 "unconnected-(J4-PadA28)") + (net 86 "unconnected-(J4-PadA29)") + (net 87 "/E") + (net 88 "unconnected-(J4-PadA30)") + (net 89 "unconnected-(J4-PadA31)") + (net 90 "unconnected-(J4-PadB18)") + (net 91 "/~{VPA}") + (net 92 "/FC2") + (net 93 "/FC1") + (net 94 "/FC0") + (net 95 "/D15") + (net 96 "/D14") + (net 97 "/D13") + (net 98 "/D12") + (net 99 "/D11") + (net 100 "/D10") + (net 101 "/D9") + (net 102 "/D8") + (net 103 "/D7") + (net 104 "/D6") + (net 105 "/D5") + (net 106 "/~{VMA}") + (net 107 "/~{IPL2}") + (net 108 "/~{IPL1}") + (net 109 "/~{IPL0}") + (net 110 "/~{RESET}") + (net 111 "/~{HALT}") + (net 112 "/CPU_D4") + (net 113 "unconnected-(J4-PadC5)") + (net 114 "/CPU_D3") + (net 115 "/CPU_D2") + (net 116 "/CPU_D1") + (net 117 "/CPU_D0") + (net 118 "/CPU_D15") + (net 119 "/CPU_D14") + (net 120 "/CPU_D13") + (net 121 "/CPU_D12") + (net 122 "/CPU_D11") + (net 123 "/CPU_D10") + (net 124 "/CPU_D9") + (net 125 "/CPU_D8") + (net 126 "/CPU_D7") + (net 127 "/CPU_D6") + (net 128 "/CPU_D5") + + (footprint "Connector_IDC:IDC-Header_2x17_P2.54mm_Vertical" (layer "F.Cu") + (tedit 5EAC9A07) (tstamp 064a14d4-7625-4c17-9926-3bc8bef61c95) + (at 89.5 52.5) + (descr "Through hole IDC box header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0") + (tags "Through hole vertical IDC box header THT 2x17 2.54mm double row") + (property "Sheetfile" "cpu_board.kicad_sch") + (property "Sheetname" "") + (path "/45a58c23-3e6d-4df0-af01-6d5948b0075c") + (attr through_hole) + (fp_text reference "J2" (at 1.27 -6.1) (layer "F.SilkS") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 91125ed1-04ac-414b-89bd-9ef46367e239) + ) + (fp_text value "MMU OUT" (at 1.27 46.74) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 6e2f7fa6-1ee9-4775-917f-ada02dc13bcd) + ) + (fp_text user "${REFERENCE}" (at 1.27 20.32 90) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp c82a2eee-3656-406a-a5cb-6b727ac05b34) + ) + (fp_line (start -4.68 -0.5) (end -4.68 0.5) (layer "F.SilkS") (width 0.12) (tstamp 01478f52-711e-460d-9130-927d9df325cb)) + (fp_line (start 5.83 -5.21) (end 5.83 45.85) (layer "F.SilkS") (width 0.12) (tstamp 142e2cf6-b82f-4007-9894-377d26b8ab0d)) + (fp_line (start -3.29 18.27) (end -1.98 18.27) (layer "F.SilkS") (width 0.12) (tstamp 1c44338c-b9a1-4269-978f-e8fd90211a46)) + (fp_line (start -1.98 22.37) (end -3.29 22.37) (layer "F.SilkS") (width 0.12) (tstamp 28221cea-e5dd-4443-909d-f89dc42a5054)) + (fp_line (start -3.29 45.85) (end -3.29 -5.21) (layer "F.SilkS") (width 0.12) (tstamp 3da59bc6-70b3-471f-bbfc-55990eeb98e5)) + (fp_line (start 5.83 45.85) (end -3.29 45.85) (layer "F.SilkS") (width 0.12) (tstamp 5256a2e5-5d23-4520-bca8-57cb50ff01c2)) + (fp_line (start 4.52 44.55) (end -1.98 44.55) (layer "F.SilkS") (width 0.12) (tstamp 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(symbol_instances + (path "/847550de-f7d9-4acd-85e6-97c49858500d" + (reference "#PWR01") (unit 1) (value "+5V") (footprint "") + ) + (path "/fbc1460e-9739-4c7a-a924-f24f150de6f5" + (reference "#PWR03") (unit 1) (value "GND") (footprint "") + ) + (path "/daf3da91-bae0-4f7a-8f29-d5974cd2c799" + (reference "#PWR0101") (unit 1) (value "GND") (footprint "") + ) + (path "/527a1750-5dd0-4f33-bf1e-cd29cd7a20df" + (reference "#PWR0102") (unit 1) (value "+5V") (footprint "") + ) + (path "/073979b1-27a0-4621-bc24-84487c2562d0" + (reference "#PWR0103") (unit 1) (value "+5V") (footprint "") + ) + (path "/7728dd25-049a-40e9-983c-d2b36df3ad29" + (reference "#PWR0104") (unit 1) (value "GND") (footprint "") + ) + (path "/ba72a2d5-bf83-49e0-b99b-326665b889dd" + (reference "#PWR0105") (unit 1) (value "+5V") (footprint "") + ) + (path "/9dcfba04-6fb5-4443-afb2-71ae3a8a988f" + (reference "#PWR0106") (unit 1) (value "GND") (footprint "") + ) + (path "/8b6750cc-ee41-46f9-81ba-60062ea7a512" + (reference "#PWR0107") (unit 1) (value "+5V") (footprint "") + ) + (path "/cfa82f70-9272-429a-b9e6-b8b88ccc47f1" + (reference "#PWR0108") (unit 1) (value "GND") (footprint "") + ) + (path "/dad8d3b9-e789-43e3-80d3-b6ff4f7dc6b0" + (reference "#PWR0109") (unit 1) (value "+5V") (footprint "") + ) + (path "/7ad2b99a-b9c7-44ab-8bdc-acac06dcd0e6" + (reference "#PWR0110") (unit 1) (value "GND") (footprint "") + ) + (path "/660b2b56-55ac-4864-90cf-c6e076099a30" + (reference "J1") (unit 1) (value "NULL MMU") (footprint "Connector_IDC:IDC-Header_2x17_P2.54mm_Vertical") + ) + (path "/45a58c23-3e6d-4df0-af01-6d5948b0075c" + (reference "J2") (unit 1) (value "MMU OUT") (footprint "Connector_IDC:IDC-Header_2x17_P2.54mm_Vertical") + ) + (path "/c6965c74-d1fd-4f8b-bc28-541073f28abf" + (reference "J3") (unit 1) (value "DMA OUT") (footprint "Connector_IDC:IDC-Header_2x17_P2.54mm_Vertical") + ) + (path "/5bc1af44-fb0d-4f8e-9d81-711b8c16f8c6" + (reference "J4") (unit 1) (value "Bus_CPU") (footprint "536366-6:TE_536366-6") + ) + (path "/f8c7401f-e334-4a21-8966-3cb30a833a3f" + (reference "U1") (unit 1) (value "68010D") (footprint "Package_DIP:DIP-64_W25.4mm_Socket") + ) + (path "/182bd7d5-4d93-46a8-9c1c-561e6db58711" + (reference "U2") (unit 1) (value "74HC245") (footprint "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm") + ) + (path "/d352469d-8eb6-43c0-95ea-6e4cf627f910" + (reference "U3") (unit 1) (value "74HC245") (footprint "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm") + ) + (path "/51b51704-6420-43a3-8572-c2e2ef1291bf" + (reference "X1") (unit 1) (value "16MHz") (footprint "Oscillator:Oscillator_DIP-8") + ) + ) +) diff --git a/cpu_board.rules b/cpu_board.rules new file mode 100644 index 0000000..1f7ca94 --- /dev/null +++ b/cpu_board.rules @@ -0,0 +1,91 @@ + +(rules PCB cpu_board + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (app.freerouting.autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 25) + (layer_rule F.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.0) + ) + (layer_rule B.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.0) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_800:400_um" + (shape + (circle F.Cu 800.0 0.0 0.0) + ) + (shape + (circle B.Cu 800.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_800:400_um" "Via[0-1]_800:400_um" default + ) + (via + "Via[0-1]_800:400_um-kicad_default" "Via[0-1]_800:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_800:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_800:400_um-kicad_default" + ) + (class default + "/BUS_A1" "unconnected-(J1-Pad2)" "/BUS_A2" "unconnected-(J1-Pad4)" "/BUS_A3" "unconnected-(J1-Pad6)" "/BUS_A4" "unconnected-(J1-Pad8)" + "/BUS_A5" +5V "/BUS_A6" "/~{BUS_BERR}" "/BUS_A7" "/~{BUS_DTACK}" "/BUS_A8" "/BUS_R{slash}~{W}" + "/BUS_A9" "/~{BUS_LDS}" "/BUS_A10" "/~{BUS_UDS}" "/BUS_A11" "/~{BUS_AS}" "/BUS_A12" "/BUS_A23" + "/BUS_A13" "/BUS_A22" "/BUS_A14" "/BUS_A21" "/BUS_A15" "/BUS_A20" "/BUS_A16" "/BUS_A19" + "/BUS_A17" "/BUS_A18" "/CPU_A1" "unconnected-(J2-Pad2)" "/CPU_A2" "unconnected-(J2-Pad4)" "/CPU_A3" "unconnected-(J2-Pad6)" + "/CPU_A4" "unconnected-(J2-Pad8)" "/CPU_A5" /DCO "/CPU_A6" "/~{CPU_BERR}" "/CPU_A7" "/~{CPU_DTACK}" + "/CPU_A8" "/CPU_R{slash}~{W}" "/CPU_A9" "/~{CPU_LDS}" "/CPU_A10" "/~{CPU_UDS}" "/CPU_A11" "/~{CPU_AS}" + "/CPU_A12" "/CPU_A23" "/CPU_A13" "/CPU_A22" "/CPU_A14" "/CPU_A21" "/CPU_A15" "/CPU_A20" + "/CPU_A16" "/CPU_A19" "/CPU_A17" "/CPU_A18" "unconnected-(J3-Pad2)" "unconnected-(J3-Pad4)" /~{BGACK} /~{BG} + /~{BR} /D4 /D3 /D2 /D1 /D0 "unconnected-(J4-PadA24)" "unconnected-(J4-PadA25)" + "unconnected-(J4-PadA26)" /CLK GND "unconnected-(J4-PadA27)" "unconnected-(J4-PadA28)" "unconnected-(J4-PadA29)" /E "unconnected-(J4-PadA30)" + "unconnected-(J4-PadA31)" "unconnected-(J4-PadB18)" /~{VPA} /FC2 /FC1 /FC0 /D15 /D14 + /D13 /D12 /D11 /D10 /D9 /D8 /D7 /D6 + /D5 /~{VMA} /~{IPL2} /~{IPL1} /~{IPL0} /~{RESET} /~{HALT} "/CPU_D4" + "unconnected-(J4-PadC5)" "/CPU_D3" "/CPU_D2" "/CPU_D1" "/CPU_D0" "/CPU_D15" "/CPU_D14" "/CPU_D13" + "/CPU_D12" "/CPU_D11" "/CPU_D10" "/CPU_D9" "/CPU_D8" "/CPU_D7" "/CPU_D6" "/CPU_D5" + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/gerbers.zip b/gerbers.zip new file mode 100644 index 0000000000000000000000000000000000000000..ebb75e4001fa2c882f6e8814f7755938853712d2 GIT binary patch literal 29508 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by KiCad (PCBNEW (6.0.4)) date 2022-05-02 09:06:26* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 Add four rect primitives between the rounded corners* +20,1,$1+$1,$2,$3,$4,$5,0* +20,1,$1+$1,$4,$5,$6,$7,0* +20,1,$1+$1,$6,$7,$8,$9,0* +20,1,$1+$1,$8,$9,$2,$3,0*% +G04 Aperture macros list end* +%TA.AperFunction,ComponentPad*% +%ADD10R,1.600000X1.600000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD11C,1.600000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD12RoundRect,0.250000X-0.600000X-0.600000X0.600000X-0.600000X0.600000X0.600000X-0.600000X0.600000X0*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD13C,1.700000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD14R,1.350000X1.350000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD15C,1.350000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD16O,1.600000X1.600000*% +%TD*% +%TA.AperFunction,ViaPad*% +%ADD17C,0.800000*% +%TD*% +%TA.AperFunction,Conductor*% +%ADD18C,0.250000*% +%TD*% +G04 APERTURE END LIST* +D10* +%TO.P,X1,1,EN*% +%TO.N,+5V*% +X67810000Y-75190000D03* +D11* +%TO.P,X1,4,GND*% +%TO.N,GND*% +X60190000Y-75190000D03* +%TO.P,X1,5,OUT*% +%TO.N,/CLK*% +X60190000Y-82810000D03* +%TO.P,X1,8,Vcc*% +%TO.N,+5V*% +X67810000Y-82810000D03* +%TD*% +D12* +%TO.P,J2,1,Pin_1*% +%TO.N,/CPU_A1*% +X93000000Y-51000000D03* +D13* +%TO.P,J2,2,Pin_2*% +%TO.N,unconnected-(J2-Pad2)*% +X95540000Y-51000000D03* +%TO.P,J2,3,Pin_3*% +%TO.N,/CPU_A2*% +X93000000Y-53540000D03* +%TO.P,J2,4,Pin_4*% +%TO.N,unconnected-(J2-Pad4)*% +X95540000Y-53540000D03* +%TO.P,J2,5,Pin_5*% +%TO.N,/CPU_A3*% +X93000000Y-56080000D03* +%TO.P,J2,6,Pin_6*% +%TO.N,unconnected-(J2-Pad6)*% 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+%TF.CreationDate,2022-05-02T09:06:26-05:00*% +%TF.ProjectId,cpu_board,6370755f-626f-4617-9264-2e6b69636164,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Paste,Bot*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW (6.0.4)) date 2022-05-02 09:06:26* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/gerbers/cpu_board-B_Silkscreen.gbr b/gerbers/cpu_board-B_Silkscreen.gbr new file mode 100644 index 0000000..53daf31 --- /dev/null +++ b/gerbers/cpu_board-B_Silkscreen.gbr @@ -0,0 +1,15 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,(6.0.4)*% +%TF.CreationDate,2022-05-02T09:06:26-05:00*% +%TF.ProjectId,cpu_board,6370755f-626f-4617-9264-2e6b69636164,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Legend,Bot*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW (6.0.4)) date 2022-05-02 09:06:26* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/gerbers/cpu_board-Edge_Cuts.gbr b/gerbers/cpu_board-Edge_Cuts.gbr new file mode 100644 index 0000000..07110e6 --- /dev/null +++ b/gerbers/cpu_board-Edge_Cuts.gbr @@ -0,0 +1,26 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,(6.0.4)*% +%TF.CreationDate,2022-05-02T09:06:27-05:00*% +%TF.ProjectId,cpu_board,6370755f-626f-4617-9264-2e6b69636164,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Profile,NP*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW (6.0.4)) date 2022-05-02 09:06:27* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%TA.AperFunction,Profile*% +%ADD10C,0.100000*% +%TD*% +G04 APERTURE END LIST* +D10* +X25000000Y-43000000D02* +X125000000Y-43000000D01* +X125000000Y-43000000D02* +X125000000Y-143000000D01* +X125000000Y-143000000D02* +X25000000Y-143000000D01* +X25000000Y-143000000D02* +X25000000Y-43000000D01* +M02* diff --git a/gerbers/cpu_board-F_Cu.gbr b/gerbers/cpu_board-F_Cu.gbr new file mode 100644 index 0000000..5546172 --- /dev/null +++ b/gerbers/cpu_board-F_Cu.gbr @@ -0,0 +1,2445 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,(6.0.4)*% +%TF.CreationDate,2022-05-02T09:06:26-05:00*% +%TF.ProjectId,cpu_board,6370755f-626f-4617-9264-2e6b69636164,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Copper,L1,Top*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW (6.0.4)) date 2022-05-02 09:06:26* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 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"Version": "(6.0.4)" + }, + "CreationDate": "2022-05-02T09:06:27-05:00" + }, + "GeneralSpecs": { + "ProjectId": { + "Name": "cpu_board", + "GUID": "6370755f-626f-4617-9264-2e6b69636164", + "Revision": "rev?" + }, + "Size": { + "X": 100.1, + "Y": 100.1 + }, + "LayerNumber": 2, + "BoardThickness": 1.6, + "Finish": "None" + }, + "DesignRules": [ + { + "Layers": "Outer", + "PadToPad": 0.2, + "PadToTrack": 0.2, + "TrackToTrack": 0.2, + "MinLineWidth": 0.25 + } + ], + "FilesAttributes": [ + { + "Path": "cpu_board-F_Cu.gbr", + "FileFunction": "Copper,L1,Top", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-B_Cu.gbr", + "FileFunction": "Copper,L2,Bot", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-F_Paste.gbr", + "FileFunction": "SolderPaste,Top", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-B_Paste.gbr", + "FileFunction": "SolderPaste,Bot", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-F_Silkscreen.gbr", + "FileFunction": "Legend,Top", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-B_Silkscreen.gbr", + "FileFunction": "Legend,Bot", + "FilePolarity": "Positive" + }, + { + "Path": "cpu_board-F_Mask.gbr", + "FileFunction": "SolderMask,Top", + "FilePolarity": "Negative" + }, + { + "Path": "cpu_board-B_Mask.gbr", + "FileFunction": "SolderMask,Bot", + "FilePolarity": "Negative" + }, + { + "Path": "cpu_board-Edge_Cuts.gbr", + "FileFunction": "Profile", + "FilePolarity": "Positive" + } + ], + "MaterialStackup": [ + { + "Type": "Legend", + "Name": "Top Silk Screen" + }, + { + "Type": "SolderPaste", + "Name": "Top Solder Paste" + }, + { + "Type": "SolderMask", + "Name": "Top Solder Mask" + }, + { + "Type": "Copper", + "Name": "F.Cu" + }, + { + "Type": "Dielectric", + "Material": "FR4", + "Name": "F.Cu/B.Cu", + "Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)" + }, + { + "Type": "Copper", + "Name": "B.Cu" + }, + { + "Type": "SolderMask", + "Name": "Bottom Solder Mask" + }, + { + "Type": "SolderPaste", + "Name": "Bottom Solder Paste" + }, + { + "Type": "Legend", + "Name": "Bottom Silk Screen" + } + ] +} diff --git a/sym-lib-table b/sym-lib-table new file mode 100644 index 0000000..01da93b --- /dev/null +++ b/sym-lib-table @@ -0,0 +1,4 @@ +(sym_lib_table + (lib (name "parts")(type "KiCad")(uri "/home/pjht/projects/68010-backplane-computer/parts.kicad_sym")(options "")(descr "")) + (lib (name "bus")(type "KiCad")(uri "/home/pjht/projects/68010-backplane-computer/bus.kicad_sym")(options "")(descr "")) +)